CY7B9945V-5AI(2003) データシートの表示（PDF） - Cypress Semiconductor
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CY7B9945V-5AI Datasheet PDF : 10 Pages
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RoboClock
CY7B9945V
Block Diagram Description
The PLL adjusts the phase and the frequency of its output
signal to minimize the delay between the reference (REFA/B+,
REFA/B-) and the feedback (FB) input signals.
The CY7B9945V has a flexible REF input scheme. These
inputs allow the use of either differential LVPECL or
single-ended LVTTL inputs. To configure as single-ended
LVTTL inputs, the complementary pin must be left open (inter-
nally pulled to 1.5V), then the other input pin can be used as
a LVTTL input. The REF inputs are also tolerant to hot
insertion.
phase of 1Q[0:1] is controlled by 1F[0:1], that of 1Q[2:3] is
controlled by 1F[2:3] and that of 2Q[0:5] is controlled by
2F[0:1].
The high-fanout feedback output buffer (QF) may connect to
the feedback input (FBK). This feedback output also has one
phase function select input (FBF0) and two divider function
selects FBDS[0:1].
The phase capabilities that are chosen by the phase function
select pins are shown in Table 3. The divide capabilities for
each bank are shown in Table 4.
Table 3. Output Phase Select
The REF inputs can be changed dynamically. When changing
from one reference input to the other reference input of the
same frequency, the PLL is optimized to ensure that the clock
outputs period will not be less than the calculated system
budget (tMIN = tREF (nominal reference period) – tCCJ
(cycle-cycle jitter) – tPDEV (max. period deviation)) while
reacquiring lock.
The FS control pin setting determines the nominal operational
frequency range of the divide by one output (fNOM) of the
device. fNOM is directly related to the VCO frequency. The FS
setting for the device is shown in Table 1. For CY7B9945V, the
upper fNOM range extends from 96 MHz to 200 MHz.
Table 1. Frequency Range Select
FS[1]
LOW
Min.
24
fNOM (MHz)
Max.
52
MID
HIGH
48
100
96
200
Control Signal
1F1 1F0
1F3 1F2
2F1 2F0
FBF0
LOW LOW
LOW MID
LOW HIGH
MID LOW
MID MID
MID HIGH
HIGH LOW
HIGH MID
HIGH HIGH
Output Phase Function
1Q[0:1]
1Q[2:3]
2Q[0:5]
–4tU
–3tU
–2tU
–1tU
0tU
+1tU
+2tU
+3tU
+4tU
–4tU
–3tU
–2tU
–1tU
0tU
+1tU
+2tU
+3tU
+4tU
–8tU
–7tU
–6tU
BK1Q[0:1][2]
0tU
BK1Q[2:3][2]
+6tU
+7tU
+8tU
QF
–4tU
N/A
N/A
N/A
0tU
N/A
N/A
N/A
+4tU
Table 4. Output Divider Select
Time Unit Definition
Selectable skew is in discrete increments of time unit (tU). The
value of a tU is determined by the FS setting and the maximum
nominal output frequency. The equation to be used to
determine the tU value is as follows:
Control Signal
[1:2]DS1 [1:2]DS0
and FBDS1 and
FBDS0
LOW
LOW
LOW
MID
Output Divider Function
Bank1 Bank2 Feedback
/1
/1
/1
/2
/2
/2
tU = 1/(fNOM*N).
LOW
HIGH
/3
/3
/3
N is a multiplication factor which is determined by the FS
MID
LOW
/4
/4
/4
setting. fNOM is nominal frequency of the device. N is defined
MID
MID
/5
/5
/5
in Table 2.
Table 2. N Factor Determination
MID
HIGH
/6
/6
/6
HIGH
LOW
/8
/8
/8
CY7B9945V
HIGH
MID
/ 10
/ 10
/ 10
FS
N
fNOM (MHz) at which tU = 1.0 ns
HIGH
HIGH
/ 12
/ 12
/ 12
LOW
32
31.25
MID
16
62.5
Figure 1 illustrates the timing relationship of programmable
HIGH
8
125
Divide and Phase Select Matrix
skew outputs. All times are measured with respect to REF with
the output used for feedback programmed with 0tU skew. The
PLL naturally aligns the rising edge of the FB input and REF
input. If the output used for feedback is programmed to
The Divide Select Matrix is comprised of three independent
banks: two banks of clock outputs and one bank for feedback.
The Phase Select Matrix, on the other hand, enables
independent phase adjustments on 1Q[0:1], 1Q[2:3] and
2Q[0:5]. The frequency of 1Q[0:3] is controlled by 1DS[0:1]
another skew position, then the whole tU matrix will shift with
respect to REF. For example, if the output used for feedback
is programmed to shift –4tU, then the whole matrix is shifted
forward in time by 4tU. Thus an output programmed with 4tU
of skew will effectively be skewed 8tU with respect to REF.
while the frequency of 2Q[0:5] is controlled by 2DS[0:1]. The
Notes:
1. The level to be set on FS is determined by the “nominal” operating frequency (fNOM) of the VCO and Phase Generator. fNOM always appears on an output when
the output is operating in the undivided mode. The REF and FB are at fNOM when the output connected to FB is undivided.
2. BK1Q denotes following the skew setting of indicated Bank1 outputs.
Document #: 38-07336 Rev. *D
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