CY7C016-55AI データシートの表示（PDF） - Cypress Semiconductor

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CY7C016-55AI

16K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Cypress Semiconductor 

Switching Waveforms (continued)

Semaphore Contention [26, 27, 28]

A0L–A2L

MATCH

CY7C006

CY7C016

R/WL

SEML

A0R–A2R

tSPS

MATCH

R/WR

SEMR

Read with BUSY (M/S=HIGH)[19]

ADDRESSR

R/W R

DATA IN R

tPS

ADDRESSL

tWC

MATCH

tPWE

tSD

tHD

VALID

MATCH

C006-16

BUSYL

DATA OUTL

tBLA

Write Timing with Busy Input (M/S=LOW)

R/W

tPWE

tDDD

tBHA

tBDD

tWDD

VALID

C006-17

BUSY

tWB

tWH

Notes:

26. I/O0R = I/O0L = LOW (request semaphore); CER = CEL = HIGH.

27. Semaphores are reset (available to both ports) at cycle start.

28. If tSPS is violated, the semaphore will definitely be obtained by one side or the other, but there is no guarantee which side will control the semaphore.

C006-18

10

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