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M36DR432AD10ZA6 データシートの表示(PDF) - STMicroelectronics

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M36DR432AD10ZA6 Datasheet PDF : 52 Pages
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M36DR432AD, M36DR432BD
SUMMARY DESCRIPTION
The M36DR432AD/BD is a low-voltage Multiple
Memory Product which combines two memory de-
vices: a 32 Mbit (2Mbit x16) non-volatile Flash
memory and a 4 Mbit SRAM.
The memory is available in a Stacked LFBGA66
12x8mm - 8x8 active ball array, 0.8mm pitch pack-
age and supplied with all the bits erased (set to
‘1’).
Figure 2. Logic Diagram
VDDF VPPF VDDS
21
A0-A20
16
DQ0-DQ15
WF
EF
GF
RPF
WPF
E1S
E2S
GS
WS
UBS
M36DR432AD
M36DR432BD
LBS
VSSF VSSS
AI07309b
Table 1. Signal Names
A0-A17
Address Inputs
A18-A20
Address Inputs for Flash Chip only
DQ0-DQ15 Data Input/Outputs, Command Inputs
VDDF
Flash Power Supply
VPPF
Flash Optional Supply Voltage for Fast
Program & Erase
VSSF
Flash Ground
VDDS
SRAM Power Supply
VSSS
SRAM Ground
NC
Not Connected Internally
Flash control functions
EF
Chip Enable
GF
Output Enable
WF
Write Enable
RPF
Reset/Power-Down
WPF
Write Protect input
SRAM control functions
E1S
Chip Enable
E2S
Chip Enable
GS
Output Enable
WS
Write Enable
UBS
Upper Byte Enable
LBS
Lower Byte Enable
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