AM29BDS323D(2001) データシートの表示（PDF） - Advanced Micro Devices
部品番号
コンポーネント説明
メーカー
AM29BDS323D
(Rev.:2001)
(Rev.:2001)
Advanced Micro Devices
AM29BDS323D Datasheet PDF : 44 Pages
| |||
PRELIMINARY
INPUT/OUTPUT DESCRIPTIONS
A16–A20 = Address Inputs
A/DQ0– = Multiplexed Address/Data input/output
A/DQ15
CE#
= Chip Enable Input. Asynchronous
relative to CLK for the Burst mode.
OE#
= Output Enable Input. Asynchronous
relative to CLK for the Burst mode.
WE#
= Write Enable Input.
VCC
= Device Power Supply (1.7 V–1.9 V).
VSS
= Ground
NC
= No Connect; not connected internally
RDY
= Ready output; indicates the status of
the Burst read. Low = data not valid at
expected time. High = data valid.
CLK
= The first rising edge of CLK in
conjunction with AVD# low latches
address input and activates burst
mode operation. After the initial word
is output, subsequent rising edges of
CLK increment the internal address
counter. CLK should remain low
during asynchronous access.
AVD#
= Address Valid input. Indicates to
device that the valid address is
present on the address inputs
(address bits A0–A15 are multiplexed,
address bits A16–A20 are address
only).
Low = for asynchronous mode,
indicates valid address; for burst
mode, causes starting address to be
latched on rising edge of CLK.
High = device ignores address inputs
PS
RESET#
WP#
VPP
= Power Saving input/output
During a read operation, PS indicates
whether or not the data on the outputs
are inverted. Low = data not inverted;
High = data inverted
= Hardware reset input. Low = device
resets and returns to reading array
data. RESET# must be low during
device power up.
= Hardware write protect input. Low =
disables writes to SA70 and SA71
= At 12 V, accelerates programming;
automatically places device in unlock
bypass mode. At VIL, disables
program and erase functions. Should
be at VIH for all other conditions.
LOGIC SYMBOL
5
A16–A20
16
A/DQ0–
A/DQ15
CLK
CE#
OE#
WE#
PS
RESET#
AVD#
RDY
Am29BDS323D
7
Share Link: