UPD70741GC-25-8EU データシートの表示（PDF） - NEC => Renesas Technology

部品番号

コンポーネント説明

メーカー

UPD70741GC-25-8EU

V821™ 32-/16-BIT MICROPROCESSOR

NEC => Renesas Technology 

µPD70741

CONTENTS

1. PIN FUNCTIONS ........................................................................................................................ 8

1.1 Port Pins ......................................................................................................................................... 8

1.2 Non-Port Pins ................................................................................................................................. 8

1.3 Pin I/O Circuits and Processing of Unused Pins ...................................................................... 10

2. INTERNAL UNITS ...................................................................................................................... 12

2.1 Bus Interface Unit (BIU) ................................................................................................................ 12

2.2 Wait Control Unit (WCU) ............................................................................................................... 12

2.3 DRAM Controller (DRAMC) ........................................................................................................... 12

2.4 ROM Controller (ROMC) ................................................................................................................ 12

2.5 Interrupt Controller ........................................................................................................................ 12

2.6 DMA Controller (DMAC) ................................................................................................................ 12

2.7 Serial Interfaces (UART/CSI) ........................................................................................................ 12

2.8 Real-Time Pulse Unit (RPU) ......................................................................................................... 12

2.9 Watchdog Timer (WDT) ................................................................................................................. 13

2.10 Clock Generator (CG) .................................................................................................................... 13

2.11 Bus Arbitration Unit (BAU) ........................................................................................................... 13

2.12 Port .................................................................................................................................................. 13

3. CPU FUNCTIONS ....................................................................................................................... 14

3.1 Features .......................................................................................................................................... 14

3.2 Address Space ............................................................................................................................... 14

3.2.1 Memory map ................................................................................................................... 15

3.2.2 I/O map ............................................................................................................................ 16

3.3 CPU Register Set ........................................................................................................................... 17

3.3.1 Program register set ..................................................................................................... 18

3.3.2 System register set ........................................................................................................ 19

3.4 Built-in Peripheral I/O Registers .................................................................................................. 20

3.5 Data Types ...................................................................................................................................... 23

3.5.1 Data types ....................................................................................................................... 23

3.5.2 Data alignment ............................................................................................................... 25

3.6 Cache ............................................................................................................................................... 26

4. INTERRUPT/EXCEPTION HANDLING FUNCTIONS ............................................................... 27

4.1 Features .......................................................................................................................................... 27

5. WAIT CONTROL FUNCTIONS .................................................................................................. 30

5.1 Features .......................................................................................................................................... 30

5

Share Link: