CY7C441-14JC データシートの表示（PDF） - Cypress Semiconductor
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CY7C441-14JC Datasheet PDF : 15 Pages
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CY7C441
CY7C443
Selection Guide
Maximum Frequency (MHz)
Maximum Access Time (ns)
Minimum Cycle Time (ns)
Minimum Clock HIGH Time (ns)
Minimum Clock LOW Time (ns)
Minimum Data or Enable Set-Up (ns)
Minimum Data or Enable Hold (ns)
Maximum Flag Delay (ns)
Maximum Current (mA)
Commercial
Military/Industrial
7C441–12
7C443–12
83.3
9
12
5
5
4
0
9
140
150
7C441–14
7C443–14
71.4
10
14
6.5
6.5
5
0
10
140
150
7C441–20
7C443–20
50
15
20
9
9
6
0
15
120
130
7C441–30
7C443–30
33.3
20
30
12
12
7
0
20
100
110
Selection Guide (continued)
Density
Package
CY7C441
512 x 9
32-Pin PLCC
CY7C443
2,048 x 9
32-Pin PLCC
Maximum Ratings[1](Above which the useful life
may be impaired. For user guidelines, not test-
ed.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Input Voltage............................................ –3.0V to +7.0V
Output Current into Outputs (LOW) .............................20 mA
Static Discharge Voltage........................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.................................................... > 200 mA
Operating Range
Range
Commercial
Industrial
Ambient
Temperature
0°C to +70°C
–40°C to +85°C
VCC
5V ± 10%
5V ± 10%
Pin Definitions
Signal Name I/O
D0–8
I
Q0–8
O
ENW
I
ENR
I
CKW
I
CKR
I
F1
O
F2
O
MR
I
Description
Data Inputs: when the FIFO is not full and ENW is active, CKW (rising edge) writes data (D0 – D8)
into the FIFO’s memory
Data Outputs: when the FIFO is not empty and ENR is active, CKR (rising edge) reads data (Q0 –
Q8) out of the FIFO’s memory
Enable Write: enables the CKW input
Enable Read: enables the CKR input
Write Clock: the rising edge clocks data into the FIFO when ENW is LOW and updates the Almost
Full flag state
Read Clock: the rising edge clocks data out of the FIFO when ENR is LOW and updates the Almost
Empty and Empty flag states
Flag 1: is used in conjunction with Flag 2 to decode which state the FIFO is in (see Table 1)
Flag 2: is used in conjunction with Flag 1 to decode which state the FIFO is in (see Table 1)
Master Reset: resets the device to an empty condition
Document #: 38-06032 Rev. *A
Page 2 of 15
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