CY7C441-14JC データシートの表示（PDF） - Cypress Semiconductor
部品番号
コンポーネント説明
メーカー
CY7C441-14JC Datasheet PDF : 15 Pages
| |||
CY7C441
CY7C443
Switching Waveforms (continued)
Read to Empty Timing Diagram with Free-Running Clocks[17, 18, 20]
COUNT
1
0
1
LATENT CYCLE
0
CKR
ENR
CKW
R1
ENABLED
READ
R2
IGNORED
READ
tSKEW2
tSKEW1
W1
W2
ENW
tFD
FF11
FF22 LOW
R3
IGNORED
READ
tSKEW2
R4
FLAG
UPDATE
READ
tSKEW2
W3
W4
ENABLED
WRITE
tFD
R5
ENABLED
READ
W5
tFD
Read to Almost Empty Timing Diagram with Free-Running Clocks[17, 18]
COUNT
17
16
17
18
17
CKR
R1
R2
ENABLED
READ
R3
R4
ENABLED
READ
ENR
CKW
ENW
tSKEW1
W1
W2
ENABLED
WRITE
tSKEW2
W3
W4
ENABLED
WRITE
16
R5
ENABLED
READ
W5
R6
IGNORED
READ
W6
C441-9
15
R6
ENABLED
READ
W6
F1
HIGH
tFD
F2
tFD
tFD
C441-11
Note:
20. R2 is ignored because the FIFO is empty (count = 0). It is important to note that R3 is also ignored because W3, the first enabled write after empty, occurs
less than tSKEW2 before R3. Therefore, the FIFO still appears empty when R3 occurs. Because W3 occurs greater than tSKEW2 before R4, R4 includes W3
in the flag update.
Document #: 38-06032 Rev. *A
Page 7 of 15
Share Link: 