CY62256 データシートの表示（PDF） - Cypress Semiconductor
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CY62256 Datasheet PDF : 12 Pages
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CY62256
Switching Characteristics Over the Operating Range[5]
Parameter
Description
READ CYCLE
tRC
Read Cycle Time
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE
CE LOW to Data Valid
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
OE LOW to Data Valid
OE LOW to Low Z[6]
OE HIGH to High Z[6, 7]
CE LOW to Low Z[6]
CE HIGH to High Z[6, 7]
tPU
CE LOW to Power-Up
tPD
CE HIGH to Power-Down
WRITE CYCLE[8, 9]
tWC
Write Cycle Time
tSCE
CE LOW to Write End
tAW
Address Set-Up to Write End
tHA
Address Hold from Write End
tSA
Address Set-Up to Write Start
tPWE
WE Pulse Width
tSD
Data Set-Up to Write End
tHD
tHZWE
tLZWE
Data Hold from Write End
WE LOW to High Z[6, 7]
WE HIGH to Low Z[6]
Shaded area contains preliminary information.
CY62256−55
CY62256−70
Min.
Max.
Min.
Max.
Unit
55
70
ns
55
70
ns
5
5
ns
55
70
ns
25
35
ns
5
5
ns
20
25
ns
5
5
ns
20
25
ns
0
0
ns
55
70
ns
55
70
ns
45
60
ns
45
60
ns
0
0
ns
0
0
ns
40
50
ns
25
30
ns
0
0
ns
20
25
ns
5
5
ns
Switching Waveforms
Read Cycle No. 1 [10,11]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
DATA VALID
C62256–8
Notes:
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 100-pF load capacitance.
6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device.
7. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate
a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
9. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD
10. Device is continuously selected. OE, CE = VIL.
11. WE is HIGH for read cycle.
4
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