CY8C20234(2007) データシートの表示（PDF） - Cypress Semiconductor

部品番号

コンポーネント説明

メーカー

CY8C20234
(Rev.:2007)

PSoC® Mixed-Signal Array

Cypress Semiconductor 

CY8C20534, CY8C20434

CY8C20334, CY8C20234

Designing with User Modules

The development process for the PSoC device differs from that

of a traditional fixed function microprocessor. The configurable

analog and digital hardware blocks give the PSoC architecture

a unique flexibility. It pays dividends in managing specification

change during development and by lowering inventory costs.

These configurable resources are called PSoC Blocks. They

implement a wide variety of user selectable functions. Each

block has several registers to determine their function and con-

nectivity to other blocks, multiplexers, buses, and to the IO pins.

Iterative development cycles permit you to adapt the hardware

and the software. This substantially lowers the risk of selecting

a different part to meet the final design requirements.

To speed the development process, the PSoC Designer Inte-

grated Development Environment (IDE) provides a library of

pre-built and pre-tested hardware peripheral functions called as

User Modules. User modules make selecting and implementing

peripheral devices simple. They come in analog, digital, and

mixed signal varieties.

Each user module establishes the basic register settings to

implement the selected function. It also provides parameters to

tailor its precise configuration to a particular application. For

example, a Pulse Width Modulator user module configures one

or more digital PSoC blocks, one for each 8-bits of resolution.

The user module parameters permit you to establish the pulse

width and duty cycle. User modules also provide tested soft-

ware to cut the development time. The user module application

programming interface (API) provides high level functions to

control and respond to hardware events at run time. The API

also provides optional interrupt service routines to adapt as

needed.

The API functions are documented in user module datasheets

that are viewed directly in the PSoC Designer IDE. These

datasheets explain the internal operation of the user module

and provide performance specifications. Each datasheet

describes the use of each user module parameter and docu-

ments the setting of each register controlled by the user mod-

ule.

The development process starts when you open a new project

and bring up the Device Editor, a graphical user interface (GUI)

for configuring the hardware. Select the user modules you need

for your project and map them on to the PSoC blocks with

point-and-click simplicity. Then, build signal chains by intercon-

necting the user modules to each other and the IO pins. At this

stage, configure the clock source connections and enter param-

eter values directly or by selecting values from the drop down

menus. When the hardware configuration is ready for testing or

moves on to developing code for the project, perform the “Gen-

erate Application” step. The PSoC Designer generates the

source code that automatically configures the device to your

specification and provides the high level user module API func-

tions.

Figure 3. User Module and Source Code Development Flows

Device Editor

User

Module

Selection

Placement

and

Parameter

-ization

Source

Code

Generator

Generate

Application

Application Editor

Project

Manager

Source

Code

Editor

Build

Manager

Build

All

Debugger

Interface

to ICE

Storage

Inspector

Event &

Breakpoint

Manager

Now write the main program and any sub-routines using PSoC

Designer’s Application Editor subsystem. The Application Edi-

tor includes a Project Manager that enables to open the project

source code files (including all generated code files) from a

hierarchal view. The source code editor provides syntax color-

ing and advanced edit features for both C and assembly lan-

guage. File search capabilities include simple string searches

and recursive “grep-style” patterns. A single mouse click

invokes the Build Manager. It employs a professional strength

“makefile” system to automatically analyze all file dependencies

and run the compiler and assembler as necessary. Project level

options control optimization strategies used by the compiler and

linker. Syntax errors are displayed in a console window. Double

click the error message to show the offending line of source

code. When all is correct, the linker builds a HEX file image suit-

able for programming.

The last step in the development process takes place inside the

PSoC Designer’s Debugger subsystem. The Debugger down-

loads the HEX image to the In-Circuit Emulator (ICE) where it

runs at full speed. Debugger capabilities rival those of systems

costing many times more. In addition to traditional single step,

run-to-breakpoint, and watch variable features, the Debugger

provides a large trace buffer. This enables to define complex

breakpoint events such as monitoring address and data bus

values, memory locations, and external signals.

Document Number: 001-05356 Rev. *D

Page 5 of 34

[+] Feedback

Share Link: