CYRF69103(2007) データシートの表示（PDF） - Cypress Semiconductor

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CYRF69103
(Rev.:2007)

Programmable Radio on Chip Low Power

Cypress Semiconductor 

CYRF69103

Applications

The CYRF69103 PRoC LP is targeted for the following appli-

cations:

• Wireless HID devices

— Mice

— Remote Controls

— Presenter tools

— Barcode scanners

— POS terminal

• General purpose wireless applications:

— Industrial applications

— Home automation

— White goods

— Consumer electronics

— Toys

Functional Description

PRoC LP devices are integrated radio and microcontroller

functions in the same package to provide a dual-role

single-chip solution.

Communication between the microcontroller and the radio is

via the radio’s SPI interface.

Functional Overview

The CYRF69103 is a complete Radio System-on-Chip device,

providing a complete RF system solution with a single device

and a few discrete components. The CYRF69103 is designed

to implement low-cost wireless systems operating in the

worldwide 2.4 GHz Industrial, Scientific, and Medical (ISM)

frequency band (2.400 GHz–2.4835 GHz).

2.4 GHz Radio Function

The SoC contains a 2.4 GHz 1-Mbps GFSK radio transceiver,

packet data buffering, packet framer, DSSS baseband

controller, Received Signal Strength Indication (RSSI), and

SPI interface for data transfer and device configuration.

The radio supports 98 discrete 1 MHz channels (regulations

may limit the use of some of these channels in certain jurisdic-

tions). In DSSS modes the baseband performs DSSS

spreading/despreading, while in GFSK Mode (1 Mb/s - GFSK)

the baseband performs Start of Frame (SOF), End of Frame

(EOF) detection and CRC16 generation and checking. The

baseband may also be configured to automatically transmit

Acknowledge (ACK) handshake packets whenever a valid

packet is received.

When in receive mode, with packet framing enabled, the

device is always ready to receive data transmitted at any of the

supported bit rates, except SDR, enabling the implementation

of mixed-rate systems in which different devices use different

data rates. This also enables the implementation of dynamic

data rate systems, which use high data rates at shorter

distances and/or in a low-moderate interference environment,

and change to lower data rates at longer distances and/or in

high interference environments.

The radio meets the following world-wide regulatory require-

ments:

• Europe

— ETSI EN 301 489-1 V1.4.1

— ETSI EN 300 328-1 V1.3.1

• North America

— FCC CFR 47 Part 15

• Japan

— ARIB STD-T66

Data Transmission Modes

The radio supports four different data transmission modes:

• In GFSK mode, data is transmitted at 1 Mbps, without any

DSSS

• In 8DR mode, 1 byte is encoded in each PN code symbol

transmitted

• In DDR mode, 2 bits are encoded in each PN code symbol

transmitted

• In SDR mode, a single bit is encoded in each PN code

symbol transmitted

Both 64-chip and 32-chip data PN codes are supported. The

four data transmission modes apply to the data after the Start

of Packet (SOP). In particular, the packet length, data and

CRC are all sent in the same mode.

Microcontroller Function

The MCU function is an 8-bit Flash-programmable microcon-

troller. The instruction set has been optimized specifically for

HID and a variety of other embedded applications.

The MCU function has up to eight Kbytes of Flash for user’s

code and up to 256 bytes of RAM for stack space and user

variables.

In addition, the MCU function includes a Watchdog timer, a

vectored interrupt controller, a 16-bit Free-Running Timer, and

12-bit Programmable Interrupt Timer.

The microcontroller has 15 GPIO pins grouped into multiple

ports. With the exception of the four radio function GPIOs,

each GPIO port supports high-impedance inputs, configurable

pull up, open drain output, CMOS/TTL inputs and CMOS

output. Up to two pins support programmable drive strength of

up to 50 mA. Additionally, each I/O pin can be used to generate

a GPIO interrupt to the microcontroller. Each GPIO port has its

own GPIO interrupt vector with the exception of GPIO Port 0.

GPIO Port 0 has three dedicated pins that have independent

interrupt vectors (P0.2 - P0.4).

The microcontroller features an internal oscillator.

The PRoC LP includes a Watchdog timer, a vectored interrupt

controller, a 12-bit programmable interval timer with config-

urable 1-ms interrupt and a 16-bit free-running timer with

capture registers.

In addition, the CYRF69103 IC has a Power Management Unit

(PMU), which allows direct connection of the device to any

battery voltage in the range 1.8V to 3.6V. The PMU conditions

the battery voltage to provide the supply voltages required by

the device, and may supply external devices.

Document #: 001-07611 Rev *B

Page 2 of 73

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