CYRF69213(2007) データシートの表示（PDF） - Cypress Semiconductor
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CYRF69213 Datasheet PDF : 85 Pages
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Pinout Diagram
CYRF69213
Figure 1. Pinout
40-Lead QFN 7 × 7 mm LF48A
Corner
tabs
P0.4 1
XTAL 2
VCC 3
P0.3 4
P0.1 5
VBAT 6
VCC 7
P2.1 8
VBAT 9
RFBIAS 10
CYRF69213
WirelessUSB LP
* E-PAD Bottom Side
30 XOUT / GPIO
29 MISO / GPIO
28 P1.5 / MOSI
27 IRQ / GPIO
26 P1.4 / SCK
25 P1.3 / SS
24 P1.2 / VREG
23 VDD_Micro
22 D-
21 D+
PRoC LP Functional Overview
The SoC is designed to implement wireless device links
operating in the worldwide 2.4-GHz ISM frequency band. It is
intended for systems compliant with world-wide regulations
covered by ETSI EN 301 489-1 V1.41, ETSI EN 300 328-1
V1.3.1 (Europe), FCC CFR 47 Part 15 (USA and Industry
Canada) and TELEC ARIB_T66_March, 2003 (Japan).
The SoC contains a 2.4-GHz 1-Mbps GFSK radio transceiver,
packet data buffering, packet framer, DSSS baseband
controller, Received Signal Strength Indication (RSSI), and
SPI interface for data transfer and device configuration.
The radio supports 98 discrete 1-MHz channels (regulations
may limit the use of some of these channels in certain jurisdic-
tions). In DSSS modes the baseband performs DSSS
spreading/despreading, while in GFSK Mode (1 Mb/s - GFSK)
the baseband performs Start of Frame (SOF), End of Frame
(EOF) detection and CRC16 generation and checking. The
baseband may also be configured to automatically transmit
Acknowledge (ACK) handshake packets whenever a valid
packet is received.
When in receive mode, with packet framing enabled, the
device is always ready to receive data transmitted at any of the
supported bit rates, except SDR, enabling the implementation
of mixed-rate systems in which different devices use different
data rates. This also enables the implementation of dynamic
data rate systems, which use high data rates at shorter
distances and/or in a low-moderate interference environment,
and change to lower data rates at longer distances and/or in
high interference environments.
The MCU function is an 8-bit Flash-programmable microcon-
troller with integrated low-speed USB interface. The
instruction set has been optimized specifically for USB opera-
tions, although it can be used for a variety of other embedded
applications.
The MCU function has up to eight Kbytes of Flash for user’s
code and up to 256 bytes of RAM for stack space and user
variables.
In addition, the MCU function includes a Watchdog timer, a
vectored interrupt controller, a 16-bit Free-Running Timer, and
12-bit Programmable Interrupt Timer.
The MCU function supports in-system programming by using
the D+ and D– pins as the serial programming mode interface.
The programming protocol is not USB.
Backward Compatibility
The CYRF69213 IC is fully interoperable with the main modes
of other Cypress radios CYWUSB6934 and CYRF6936. The
62.5-kbps mode is supported by selecting 32-chip
DATA_CODE_ADR codes, DDR mode, and disabling the
SOP, length, and CRC16 fields. Similarly, the 15.675-kHz
mode is supported by selecting 64-chip DATA_CODE_ADR
codes and SDR mode.
In this way, a suitably configured CYRF69213 IC device may
transmit data to and/or receive data from a first generation
device.
Document #: 001-07552 Rev. *B
Page 4 of 85
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