HV300DB1 データシートの表示（PDF） - Supertex Inc
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HV300DB1 Datasheet PDF : 2 Pages
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VEE
+
R1
487KΩ
48V
Input
R2
9.09KΩ
R3
9.09KΩ
-
VEE
HV300DB1 Schematic
VDD
UV
PWRGD PG
HV300LG
OV
VEE Ramp
Sense Gate
Cramp
10nF
J1
Rsense
0.05Ω
M1
IRFR120N
HV300DB1
+ VDD
Cload
100µF
48V
Output
-
Drain
Bill of Materials for HV300DB1 Demo Board
Designator
Description
Value/Rating Package Part Number
Manufacturer
J1
Wire Jumper
--
--
--
--
R1
R2
R3
RSENSE
CRAMP
CLOAD
M1
HV300
Thick film chip resistor
Thick film chip resistor
Thick film chip resistor
Thick film chip resistor
Ceramic chip capacitor, X7R
Electrolytic capacitor
N-Channel MOSFET
Hot Swap IC
487K ± 1%
9.09K ± 1%
9.09K ± 1%
0.05 ± 1%
10nF, 50V
100µF, 160V
100V, 0.21
90V
0805
0805
0805
1206
0805
--
Dpak
SO-8
ERJ6ENF487K Panasonic
ERJ6ENF9.09K Panasonic
ERJ6ENF9.09K Panasonic
WSL1206-.05 Dale
ECJ-2VB1H103K Panasonic
ECA-2CHG101 Panasonic
IRFR120N
International Rectifier
HV300LG
Supertex Inc.
HV300 Typical Waveforms
Drain
50V/div
VIN
50V/div
Gate
5.00V/div
Iinrush
500mA/div
5.00ms/div
Notes:
1) Some versions of the HV300DB1 may include a 10nF
capacitor from IC pins 5 to 6 (the MOSFET gate to source).
This capacitor is used to eliminate ringing at the end of the
inrush period.
2) Current can be measured with a current probe on the Vdd
line. The current drawn by the load can be measured by
replacing J1 with a small resistor and measuring the voltage
drop. Alternatively, a current probe can be used by replacing
J1 with a wire loop.
3) PG is an open drain output and will have no effect if probed
without a pullup.
4. The dual plateau characteristic of the gate response is an
intended result of Supertex’s closed loop hot swap solution.
The steep voltage jump of the gate occurs after the MOSFET
is fully on and indicates the point at which the IC goes into
sleep mode (PG high).
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
PB
05/16/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
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