T221160A-30J データシートの表示（PDF） - Taiwan Memory Technology
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T221160A-30J Datasheet PDF : 14 Pages
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tm TE
CH
FUNCTIONAL BLOCK DIAGRAM
T221160A
A0
A1
A2
A3
A4
A5
A6
A7
RAS
WE
CASL
CASH
CAS
NO.2 CLOCK
GENERATOR
COLUMN.
8
ADDRESS
BUFFER
REFRESH
CONTROLLER
REFRESH
COUNTER
8
ROW.
8
ADDRESS
BUFFERS(8)
NO.1 CLOCK
GENERATOR
CONTROL
LOGIC
DATA-IN BUFFER
COLUMN
8
DECODER
256
8
8
SENSE AMPLIFIERS
VO GATING
256 x 16
DATA-
B UOFUFTE R
16
256 x 256 x 16
8
256
M AE MR ROAR Y
Y
DQ01
.
16
.
DQ16
OE
Vcc
Vss
PIN DESCRIPTIONS
PIN NO.
16~19,22~25
14
28
29
13
27
2~5,6~10,31~34,36~39
1,6,20
21,35,40
11,12,15,30
SYM.
A0-A7
RAS
CASH
CASL
WE
OE
I/O1 - I/O16
Vcc
Vss
NC
TYPE
DESCRIPTION
Input Address Input
Input Row Address Strobe
Input Column Address Strobe /Upper Byte Control
Input Column Address Strobe /Lower Byte Control
Input Write Enable
Input Output Enable
Input/ Output Data Input/ Output
Supply Power, 5V
Ground Ground
-
No Connect
Taiwan Memory Technology, Inc. reserves the right P. 2
to change products or specifications without notice.
Publication Date: FEB. 2002
Revision:A
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