DM74LS273N データシートの表示（PDF） - Fairchild Semiconductor
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DM74LS273N Datasheet PDF : 6 Pages
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Functional Description
The DM74LS273 is an 8-bit parallel register with a common
Clock and common Master Reset. When the MR input is
LOW, the Q outputs are LOW, independent of the other
inputs. Information meeting the setup and hold time
requirements of the D inputs is transferred to the Q outputs
on the LOW-to-HIGH transition of the clock input.
Logic Diagram
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