DM9161B データシートの表示（PDF） - Davicom Semiconductor, Inc.
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DM9161B Datasheet PDF : 45 Pages
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DM9161B
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
39
DISMDIX
I HP Auto-MDIX Control
(D) 1: Disable auto mode
0: Enable HP Auto-MDIX mode
5.5 Bias and Clock, 4 pins
Pin No.
Pin Name I/O
Description
47
BGRESG
P Band gap Ground
48
BGRES
O Band gap Voltage Reference Resistor 6.8K ohm +/- 1%
42
XT2
I/O Crystal Output or REF_CLK input for RMII mode
43
XT1
I Crystal Input or REF_CLK input for RMII mode
*RMII mode REF_CLK 50MHz choice XT1 or XT2.
*Pin45: NC
5.6 Power, 12 pins
Pin No.
1,2
9
5
6
46
23,30,41
15,33,44
Pin Name
AVDDR
AVDDT
AGND
AGND
AGND
DVDD
DGND
I/O
Description
P 1.8V Analog Receive Power output
P 1.8V Analog Transmit Power output
P Analog Receive Ground
P Analog Transmit Ground
P Analog Substrate Ground
P 3.3V Digital Power
P Digital Ground
5.7 Table of Media Type Selection
OP2
OP1
OP0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Function
Dual Speed 100/10 HDX
Reserved
Reserved
Manually Select 10TX HDX
Manually Select 10TX FDX
Manually Select 100TX HDX
Manually Select 100TX FDX
Auto-negotiation Enables All Capabilities
9
Final
Version: DM9161B-12-DS-F01
October 16, 2009
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