DP805X データシートの表示（PDF） - Digital Core Design

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DP805X

Pipelined High Performance Microcontroller

Digital Core Design 

DP805x Instructions set details

2.2.5. PROGRAM BRANCHES

- 10 -

Mnemonic

ACALL addr11

LCALL addr16

RET

RETI

AJMP addr11

LJMP addr16

SJMP rel

JMP @A+DPTR

JZ rel

JNZ rel

JC rel

JNC

JB bit,rel

JNB bit,rel

JBC bit,direct rel

CJNE A,direct rel

CJNE A,#data rel

CJNE Rn,#data rel

CJNE @Ri,#data rel

DJNZ Rn,rel

DJNZ direct,rel

NOP

Description

Absolute subroutine call

Long subroutine call

Return from subroutine

Return from interrupt

Absolute jump

Long jump

Short jump (relative address)

Jump indirect relative to the DPTR

Jump if accumulator is zero

Jump if accumulator is not zero

Jump if carry flag is set

Jump if carry flag is not set

Jump if direct bit is set

Jump if direct bit is not set

Jump if direct bit is set and clear bit

Compare direct byte to A and jump if not equal

Compare immediate to A and jump if not equal

Compare immediate to reg. and jump if not equal

Compare immediate to ind. and jump if not equal

Decrement register and jump if not zero

Decrement direct byte and jump if not zero

No operation

Table 7. Program branches

Code

0x11-0xF1

03

22

32

01-E1

02

80

73

60

70

40

50

20

30

10

B5

B4

B8-BF

B6-B7

D8-DF

D5

00

Bytes Cycles

2

4

3

4

1

4

1

4

2

3

3

4

2

3

1

5

2

4

2

4

2

3

2

3

3

5

3

5

3

5

3

5

3

4

3

4

3

5

2

4

3

5

1

1

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