DS1023-50 データシートの表示（PDF） - Dallas Semiconductor -> Maxim Integrated
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DS1023-50 Datasheet PDF : 16 Pages
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TIMING DIAGRAM: SILICON DELAY LINE Figure 9
DS1023
AC ELECTRICAL CHARACTERISTICS -
DS1023-025 Delay Specifications
PARAMETER
SYMBOL MIN
Step Zero Delay
-absolute
-wrt REF
Reference Delay
Delay Step Size
Maximum Delay
tD0
tDREF0
-2
tREF
tSTEP
0
-absolute
tDMAX
75
-wrt REF
tDREF
60
Delay Matching, Rising Edge
-1
to Falling Edge
Integral Non-linearity
(deviation from straight line)
terr
-1
OUT Delta Delay
tINV0
0
IN High to PWM High
tPWM0
Minimum PWM Output
Pulse Width
tPWM
5
Minimum Input Pulse Width
tWI
20
Minimum Input Period
40
Input Rise and Fall Times
tr, tf
0
(TA = 0°C to 70°C; VCC = 5V ±=5%)
TYP MAX UNITS NOTES
16.5
22
-1.5
0
18
22
0.25
0.75
ns
1, 13
ns
2, 14
ns
3, 13
ns
4
80
89
63.75
67.5
+1
ns
5, 13
ns
6, 14
ns
15
0
+1
1
2
16.5
22
1
ns
7
ns
8
ns
9, 13
ns
10
ns
11
ns
12
µs
16
10 of 16
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