DS1830U データシートの表示（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS1830U

Reset Sequence Pushbutton

Dallas Semiconductor -> Maxim Integrated 

D1830/A

APPLICATION DIAGRAM — CASCADE DELAY CONFIGURATIONS Figure 4

MASTER

SEE NOTE 2

SEE NOTE 1

SLAVE

SEE NOTE 2

Note 1: The RST3 output tied to the pushbutton reset would be pulled to VCC through the 40kW resistor in

the pushbutton input. If a stronger pull-up is required an additional pull-up resistor could be added.

Note 2: When using the cascade configuration, it is important that the TOL pins of the master and the

slave are configured so that the master’s VCCTP is greater than the slave’s VCCTP. This will ensure that

when the master’s higher VCCTP is crossed, the resets will ripple through to the slave.

TIMING DIAGRAM — POWER-DOWN Figure 5

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