DS1921G データシートの表示（PDF） - Maxim Integrated
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DS1921G Datasheet PDF : 42 Pages
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Thermochron iButton
ELECTRICAL CHARACTERISTICS (continued)
(VPUP = +2.8V to +5.25V, TA = -40°C to +85°C.)
PARAMETER
IO PIN: 1-Wire WRITE
Write-Zero Low Time
(Notes 1, 12, 13)
Write-One Low Time
(Notes 1, 13)
IO PIN: 1-Wire READ
Read Low Time (Notes 1, 14)
Read Sample Time
(Notes 1, 14)
REAL-TIME CLOCK
Frequency Deviation
TEMPERATURE CONVERTER
Tempcore Operating Range
Conversion Time
Thermal Response Time
Constant
SYMBOL
CONDITIONS
Standard speed
tW0L Overdrive speed, VPUP > 4.5V
Overdrive speed
Standard speed
tW1L
Overdrive speed
tRL
tMSR
Standard speed
Overdrive speed
Standard speed
Overdrive speed
F
-5°C to +46°C
TTC
tCONV
RESP
(Note 15)
MIN TYP MAX UNITS
60
120
6
15
µs
8.5
15
5
15
µs
1
2
5
1
tRL +
tRL +
15 -
µs
2-
15
µs
2
-48
+46 ppm
-40
+85
°C
19
90
ms
130
s
Conversion Error
(Notes 16, 17)
-40°C to < -30°C
-30°C to +70°C
> +70°C to +85°C
-1.3
+1.3
-1.0
+1.0
°C
-1.3
+1.3
Number of Conversions
NCONV (Notes 4, 18)
(See the lifetime graphs.) —
Note 1: System requirement.
Note 2: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery
times. The specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For
more heavily loaded systems, an active pullup such as that found in the DS2480B may be required.
Note 3: Capacitance on IO could be 800pF when power is first applied. If a 2.2kΩ resistor is used to pull up the data line, 2.5µs
after VPUP has been applied, the parasite capacitor does not affect normal communication.
Note 4: These values are derived from simulation across process, voltage, and temperature and are not production tested.
Note 5: Input load is to ground.
Note 6: All voltages are referenced to ground.
Note 7: VTL and VTH are functions of the internal supply voltage, which is a function of VPUP and the 1-Wire recovery times. The
VTH and VTL maximum specifications are valid at VPUP = 5.25V. In any case, VTL < VTH < VPUP.
Note 8: Voltage below which, during a falling edge of IO, a logic 0 is detected.
Note 9: The voltage on IO must be less than or equal to VILMAX whenever the master drives the line low.
Note 10: Voltage above which, during a rising edge on IO, a logic 1 is detected.
Note 11: The I-V characteristic is linear for voltages less than 1V.
Note 12: Numbers in bold are not in compliance with the published iButton standards. See the Comparison Table.
Note 13: ε in Figure 15 represents the time required for the pullup circuitry to pull the voltage on the IO pin up from VIL to VTH. The
actual maximum duration for the master to pull the line low is tW1LMAX + tF - ε and tW0LMAX + tF - ε, respectively.
Note 14: δ in Figure 15 represents the time required for the pullup circuitry to pull the voltage on the IO pin up from VIL to the input
high threshold of the bus master. The actual maximum duration for the master to pull the line low is tRLMAX + tF.
Note 15: This number was derived from a test conducted by Cemagref in Antony, France, in July 2000.
http://www.cemagref.fr/English/index.htm Test Report No. E42
Note 16: Total accuracy is ∆ϑ plus 0.25°C quantization due to the 0.5°C digital resolution of the device.
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