DS1994 データシートの表示（PDF） - Maxim Integrated

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コンポーネント説明

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DS1994

4Kb Plus Time Memory iButton®

Maxim Integrated 

DS1994

When a given alarm occurs, the corresponding alarm flag is set to a logic 1. The alarm flag is cleared by

reading the status register.

3 RTE Real-time clock alarm flag

4 ITE Interval timer alarm flag

5 CCE Cycle counter alarm flag

Writing any of the interrupt enable bits to a logic 0 allows an interrupt condition to be generated when its

corresponding alarm flag is set (see the Interrupts section).

Control Register

7

6

5

4

3

2

1

0

DSEL

STOP

START

AUTO

MAN.

OSC

RO

WPC WPI WPR 0201h

0 WPR Write protect real-time clock/alarms registers

1 WPI Write protect interval timer/alarms registers

2 WPC Write protect cycle counter/alarms registers

Setting a write protect bit to a logic 1 permanently write protects the corresponding counter and alarm

registers, all write protect bits, and additional bits in the control register. The write protect bits cannot be

written in a normal manner (see the Write Protect/Programmable Expiration section).

3 RO Read only

If a programmable expiration occurs and the read only bit is set to a logic 1, then the DS1994 becomes

read only. If a programmable expiration occurs and the read only bit is a logic 0, then only the 64-bit

lasered ROM can be accessed (see the Write Protect/Programmable Expiration section).

4 OSC Oscillator enable

This bit controls the crystal oscillator. When set to a logic 1, the oscillator starts operation. When the

oscillator bit is a logic 0, the oscillator stops.

5 AUTO/MAN Automatic/Manual Mode

When this bit is set to a logic 1, the interval timer is in automatic mode. In this mode, the interval timer is

enabled by the data line. When this bit is set to a logic 0, the interval timer is in manual mode. In this

mode, the interval timer is enabled by the STOP/START bit.

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