DS2432P データシートの表示（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS2432P

1k-Bit Protected 1-Wire™ EEPROM with SHA-1 Engine

Dallas Semiconductor -> Maxim Integrated 

PRELIMINARY

DS2432

The secret can be installed either by copying data from the scratchpad to the secrets memory or by

computation using the current secret and the scratchpad contents as partial secret. The secret cannot be

read directly; only the SHA engine has access to it for computing message authentication codes.

The address range 0088h to 008Fh, also referred to as register page, contains special function registers as

well as general-purpose user-bytes and one factory byte. Once programmed to AAh or 55h, most of these

bytes become write-protected and can no longer be altered. All other codes will neither write-protect the

address nor activate the special function associated to that particular byte. Special functions are: 1) write-

protecting only the secret, 2) write-protecting all four data memory pages simultaneously, 3) activating

EPROM mode for data memory page 1 only, and 4) write-protecting data memory page 0 only. Once the

EPROM mode is activated, bits in the address range 0020h through 003Fh can only be altered from a

logic 1 to a logic 0, provided that the data memory is not write protected.

The factory byte will either read 55H or AAh. Typically, this address will read 55h, indicating that the

addresses 008E and 008F are read/write user-bytes without any special function or locking mechanism.

The code of AAh indicates that these two bytes are programmed with a 16-bit manufacturer ID and then

write-protected at the factory. The manufacturer ID can be a customer-supplied identification code that

assists the application software in identifying the product the DS2432 is associated with and in faster

selection of the applicable secret. To setup and register a manufacturer ID contact the factory.

The address range 0090h to 0097h provides an alternate way to read the device’s ROM registration

number. The family code is stored at the lower address followed by the 48-bit serial number and the 8-bit

CRC, which is stored at address 0097h. In reading through these addresses (0090h to 0097h) the bus

master will receive the individual bits of the registration number in exactly the same sequence as with a

ROM function command.

ADDRESS REGISTERS Figure 6

Bit # 7

6

5

4

3

2

1

0

T2 T1 T0

Target Address (TA1) T7

T6

T5

T4

T3

(0)

(0)

(0)

Target Address (TA2) T15 T14 T13 T12 T11 T10 T9 T8

Ending Address with

Data Status (E/S) AA

1

PF

1

(Read Only)

E2 E1 E0

1

(1) (1) (1)

ADDRESS REGISTERS AND TRANSFER STATUS

The DS2432 employs three address registers: TA1, TA2 and E/S (Figure 6). These registers are common

to many other 1-Wire devices but operate slightly differently with the DS2432. Registers TA1 and TA2

must be loaded with the target address to which the data will be written or from which data will be read.

Register E/S is a read-only transfer-status register, used to verify data integrity with write commands.

Since the scratchpad of the DS2432 is designed to accept data in blocks of eight bytes only, the lower

three bits of TA1 will be forced to 0 and the lower three bits of the E/S register (Ending Offset) will

always read 1. This indicates that all the data in the scratchpad will be used for a subsequent copying into

main memory or secret. Bit 5 of the E/S register, called PF or “partial byte flag”, is a logic-1 if the

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