DS2438AZ/TR データシートの表示（PDF） - Maxim Integrated

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DS2438AZ/TR

Smart Battery Monitor

Maxim Integrated 

64-BIT LASERED ROM FORMAT Figure 3

DS2438

8-BIT CRC CODE

48-BIT SERIAL NUMBER

8-BIT FAMILY CODE (26h)

MSb

LSb MSb

LSb MSb

LSb

CRC Generation

The DS2438 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM. The bus master can

compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within

the DS2438 to determine if the ROM data has been received error-free by the bus master. The equivalent

polynomial function of this CRC is:

CRC = X8 + X5 + X4 +1

The DS2438 also generates an 8-bit CRC value using the same polynomial function shown above and

provides this value to the bus master to validate the transfer of data bytes. In each case where a CRC is

used for data transfer validation, the bus master must calculate a CRC value using the polynomial

function given above and compare the calculated value to either the 8-bit CRC value stored in the 64-bit

ROM portion of the DS2438 (for ROM reads) or the 8-bit CRC value computed within the DS2438

(which is read as a 9th byte when a scratchpad is read). The comparison of CRC values and decision to

continue with an operation are determined entirely by the bus master. There is no circuitry inside the

DS2438 that prevents a command sequence from proceeding if the CRC stored in or calculated by the

DS2438 does not match the value generated by the bus master. Proper use of the CRC as outlined in the

flowchart of Figure 6 can result in a communication channel with a very high level of integrity.

The 1-Wire CRC can be generated using a polynomial generator consisting of a shift register and XOR

gates as shown in Figure 4. Additional information about the Dallas 1-Wire Cyclic Redundancy Check is

available in Application Note 27 entitled “Understanding and Using Cyclic Redundancy Checks with

Dallas Semiconductor Touch Memory Products.”

The shift register bits are initialized to 0. Then starting with the least significant bit of the family code,

1 bit at a time is shifted in. After the 8th bit of the family code has been entered, the serial number is

entered. After the 48th bit of the serial number has been entered, the shift register contains the CRC

value.

1-WIRE CRC CODE Figure 4

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