K6F8016U6C-FF55 データシートの表示（PDF） - Samsung

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K6F8016U6C-FF55

512K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM

Samsung 

K6F8016U6C Family

Preliminary

CMOS SRAM

TIMING DIAGRAMS

TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS1=OE=VIL, CS2=WE=VIH, UB or/and LB=VIL)

Address

Data Out

tRC

tAA

tOH

Previous Data Valid

Data Valid

TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)

Address

CS1

tRC

tAA

tOH

tCO

CS2

UB, LB

OE

Data out

High-Z

tBA

tOE

tOLZ

tBLZ

tLZ

Data Valid

tHZ

tBHZ

tOHZ

NOTES (READ CYCLE)

1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage

levels.

2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device

interconnection.

6

Revision 0.0

May 2003

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