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DS_S1D2502A01 データシートの表示(PDF) - Samsung

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DS_S1D2502A01 Datasheet PDF : 57 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
S1D2502A01
PIN DESCRIPTION
Pin No
1
32
3
4
5
Pin Name
VFLB
HFLB
VCO_IN_P
VPEF/
VREF
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
Table 2. Pin Description
Schematic
VFLB
HFLB
Description
FLB signal is in TTL level
Multi polarity input
PLL loop filter output
BandGap ref. output
7
Contrast cap
(CONT_CAP)
Contrast cap range
(0.1uF — 5uF)
4.0K
I2C Data
Vref
100µA
8
ABL_IN
VCC
100K
2K
Vref
ABL input DC range
(1 — 4.5V)
Vref
250µA
4

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