EDS2516APTA データシートの表示（PDF） - Elpida Memory, Inc
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EDS2516APTA Datasheet PDF : 53 Pages
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EDS2516APTA
Test Conditions
• Input and output timing reference levels: 1.4V
• Input waveform and output load: See following figures
2.4 V
input
2.0 V
I/O
0.4 V 0.8 V
tT
tT
Output load
Relationship Between Frequency and Minimum Latency
EParameter
-60
-7A
-75
Frequency (MHz)
166
133
133
tCK (ns)
Symbol 6.0
7.5
7.5
OActive command to column command
(same bank)
lRCD
3
2
3
Active command to active command
(same bank)
lRC
10
8
9
Active command to precharge command
(same bank)
lRAS
7
6
6
L Precharge command to active command
(same bank)
lRP
3
2
3
Write recovery or data-in to precharge
command (same bank)
lDPL
2
2
2
Active command to active command
(different bank)
lRRD 2
2
2
P Self refresh exit time
lSREX 1
1
1
Last data in to active command
(Auto precharge, same bank)
lDAL
5
4
5
Self refresh exit to command input
lSEC 10
8
9
r Precharge command to high impedance
(CL = 2)
lHZP
—
2
2
o (CL = 3)
lHZP
3
3
3
Last data out to active command
(Auto precharge, same bank)
lAPR 1
1
1
Last data out to precharge (early
precharge)
d (CL = 2)
lEP
—
–1
–1
(CL = 3)
lEP
–2
–2
–2
Column command to column command lCCD 1
1
1
u Write command to data in latency
lWCD 0
0
0
DQM to data in
lDID
0
0
0
DQM to data out
lDOD 2
2
2
CKE to CLK disable
lCLE
1
1
1
c Register set to active command
lMRD 2
2
2
t /CS to command disable
lCDD 0
0
0
CL
Unit
Notes
tCK
1
tCK
1
tCK
1
tCK
1
tCK
1
tCK
1
tCK
2
tCK
= [lDPL + lRP]
tCK
= [lRC]
3
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
Power down exit to command input
lPEC 1
1
1
tCK
Notes: 1. lRCD to lRRD are recommended value.
2. Be valid [DESL] or [NOP] at next command of self refresh exit.
3. Except [DESL] and [NOP]
Data Sheet E0359E20 (Ver. 2.0)
8
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