MB86435 データシートの表示（PDF） - Fujitsu

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MB86435

3 V Single Power Supply Audio Interface Unit (AIU)

Fujitsu 

MB86435

s FUNCTIONAL DESCRIPTION

1. Register Settings

The MB86435 IC chip controls all electronic volume, switching, tone generator circuits and power-down control

circuits by means of the SRD, STB and SRC data input signals.

The MB86435 uses a 9-bit serial data format consisting of a 4-bit address followed by 5 data bits. Data is picked

up at the rise of the SRC signal, and latched by the STB L-level signal. The 9-bits of serial data preceding the STB

signal are considered valid. These register settings are not reset at power-down. They can be reset when data is

initialized by an XPRST L-level signal.

(1) Mode Settings

Control

segment

EV0

EV1

EV2

TX-MUTE

RX-MUTE

SW5

SW4

SW3

SW8

SW6

SW9

SW7

ATT

Address Data bit

Setting description

A3 A2 A1 A0 D4 D3 D2 D1 D0

0

0

0

1

D4 D3 D2 D1 D0

Sending audio level adjustment.

Adjusts EV0 gain.

0

0

1

0

D4 D3 D2 D1 D0

Sending audio level adjustment.

Adjusts EV1 gain.

0 011

Sending audio level adjustment.

* * D2 D1 D0 Adjusts EV2 gain.

D0: Sending audio mute SW 3, 4, 5 on/off

control.

Mute: 1, Unmute: 0

0 1 0 0 D4 * * * D0 D4: Sending audio mute SW 6, 7, 8, 9 on/

off control.

Mute: 1, Unmute: 0

D0: TAUD mute SW 5 on/off control.

Mute: 1, Unmute: 0

D1: JMIC mute SW 4 on/off control.

Mute: 1, Unmute: 0

0 1 0 1 D4 * D2 D1 D0 D2: MIC mute SW 3 on/off control.

Mute: 1, Unmute: 0

D4: RAUD mute SW 8 on/off control.

Mute: 1, Unmute: 0

D0: EAR, XEAR mute SW 6 on/off control.

Mute: 1, Unmute: 0

D1: TONE, XTONE mute SW 9 on/off

control.

0 1 1 0 D4 * D2 D1 D0

Mute: 1, Unmute: 0

D2: JEAR mute SW 7 on/off control.

Mute: 1, Unmute: 0

D4: JEAR attenuation level switch.

0: –2.5 dB, 1: –8.5 dB.

Initial data bit

setting (at reset) Remarks

D4 D3 D2 D1 D0

01 1 11

01 1 11

*1

* * 1 00

0* * * 0

*2, *3

*3, *4

*2, *5

0* 0 00

*2

*3, *4, *6

0* 0 00

*4

(Continued)

7

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