FAN4801 データシートの表示（PDF） - Fairchild Semiconductor

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FAN4801

FAN480X PFC+PWM Combination Controller Application

Fairchild Semiconductor 

AN-8027

V IN

IL

VO

It is typical to set the second boost output voltage as

340V~300V.

RF1

ISENSE

RRMS1

CRMS1

CRMS2

RIAC

CF1

IAC

RRMS2IAC VRMS

RRMS3

RVC2

VE A

RVC

RVC1

RCS1

RM

RM

IMO

IEA

RIC

CIC2 CIC1

Drive logic VREF

+

-

OPFC

RFB1

FBPFC

2.5V

RFB2

Figure 5. Gain Modulation Block

IAC

I MO

RM

RCS1

IL

Figure 6. Inductor Current Shaping

The voltage control loop regulates PFC output voltage

using internal error amplifier such that the FBPFC voltage

is same as internal reference of 2.5V.

Brownout Protection

FAN480X has a built-in internal brownout protection

comparator monitoring the voltage of the VRMS pin. Once

the VRMS pin voltage is lower than 1.05V (0.9V for

FAN4802L), the PFC stage is shutdown to protect the

system from over current. The FAN480X starts up the

boost stage once the VRMS voltage increases above 1.9V

(1.65V for FAN4802L).

Figure 7. Block of Two-Level PFC Output

Oscillator

The internal oscillator frequency of FAN480X is

determined by the timing resistor and capacitor on RT/CT

pin. The frequency of the internal oscillator is given by:

fOSC

=

0.56 ⋅ RT

1

⋅ CT

+ 360CT

(6)

Because the PWM stage of FAN480X generally uses a

forward converter, it is required to limit the maximum duty

cycle at 50%. To have a small tolerance of the maximum

duty cycle, a frequency divider with toggle flip-flops is

used, as illustrated in Figure 8. The operation frequency of

PFC and PWM stage is one quarter (1/4) of the oscillator

frequency. (For FAN4800C and FAN4802/2L, the

operation frequencies for PFC and PWM stages are one

quarter (1/4) and one half (1/2) of the oscillator frequency,

respectively).

The dead time for the PFC gate drive signal is determined

by the equation:

tDEAD = 360CT

(7)

The dead time should be smaller than 2% of switching

period to minimize line current distortion around line zero

crossing.

Two-Level PFC Output

To improve system efficiency at low AC line voltage and

light load condition, FAN480X provides two-level PFC

output voltage. As shown in Figure 7, FAN480X monitors

VEA and VRMS voltages to adjust the PFC output voltage.

When VEA and VRMS are lower than the thresholds, an

internal current source of 20µA is enabled that flows

through RFB2, increasing the voltage of the FBPFC pin.

This causes the PFC output voltage to reduce when 20µA

is enabled, calculated as:

VOPFC 2

=

RFB1 + RFB2

RFB 2

× (2.5 - 20μA× RFB2 )

© 2009 Fairchild Semiconductor Corporation

Rev. 1.0.0 • 8/26/09

(5)

3

VREF

RT/

CT

T-FF

TQ

T-FF

TQ

OSC

OPFC, OPWM

OPWM (FAN4800C, FAN4802/2L)

Figure 8. Oscillator Configuration

www.fairchildsemi.com

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