FAN48610UC50X データシートの表示（PDF） - Fairchild Semiconductor
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FAN48610UC50X Datasheet PDF : 11 Pages
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Block Diagrams
SW
Q2B Q2A
VIN
CIN
PGND
Q2
Q1
Synchronous
Rectifier
Control
VOUT
COUT
EN
MODULATOR
LOGIC
AND CONTROL
AGND
Figure 2. IC Block Diagram
Table 1. Recommended Components
Component
Description
L1
0.47 µH, 30%, 2016
CIN
COUT
10 µF, 10%, 6.3 V, X5R, 0603
22 µF, 20%, 6.3 V, X5R, 0603
Vendor
Toko: DFE201612C
DFR201612C
Cyntec: PIFE20161B
Murata: GRM188R60J106K
TDK: C1608X5R0J106K
TDK: C1608X5R0J226M
Parameter
L
DCR (Series R)
C
C
Typ.
0.47
40
10
22
Pin Configuration
VOUT
A1
A2
SW
B1
B2
PGND
C1
C2
VIN
A3
EN
B3
AGND
C3
Figure 3. Top View
A3
A2
A1
B3
B2
B1
C3
C2
C1
Figure 4. Bottom View
Unit
µH
mΩ
µF
µF
Pin Definitions
Pin #
A1, A2
A3
B1, B2
B3
C1, C2
C3
Name
VOUT
VIN
SW
EN
PGND
AGND
Description
Output Voltage. This pin is the output voltage terminal; connect directly to COUT.
Input Voltage. Connect to Li-Ion battery input power source and the bias supply for the gate drivers.
Switching Node. Connect to inductor.
Enable. When this pin is HIGH, the circuit is enabled.
Power Ground. This is the power return for the IC. COUT capacitor should be returned with the shortest
path possible to these pins.
Analog Ground. This is the signal ground reference for the IC. All voltage levels are measured with
respect to this pin – connect to PGND at a single point.
© 2013 Fairchild Semiconductor Corporation
FAN48610 • Rev. 1.0.0 •
2
www.fairchildsemi.com
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