FAN5009 データシートの表示（PDF） - Fairchild Semiconductor

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FAN5009

Dual Bootstrapped 12V MOSFET Driver

Fairchild Semiconductor 

FAN5009

Pin Configuration

BOOT

PWM

OD

VCC

1

8

2

7

FAN5009

3

6

4

5

HDRV

SW

PGND

LDRV

FAN5009M 8-pin SO-8 package

PRODUCT SPECIFICATION

Paddle

(Ground)

BOOT

PWM

OD

VCC

1

8

2

7

FAN5009

3

6

4

5

HDRV

SW

PGND

LDRV

FAN5009MP 8-pin MLP package

(Paddle should be connected to ground or left floating)

Pin Definitions

Pin # Pin Name Pin Function Description

1

BOOT Bootstrap Supply Input. Provides voltage supply to high-side MOSFET driver. Connect to

bootstrap capacitor. See Applications Section.

2

PWM PWM Signal Input. This pin accepts a logic-level PWM signal from the controller.

3

OD Output Disable. When low, this pin disables FET switching (HDRV and LDRV are held low).

4

VCC Power Input. +12V chip bias power. Bypass with a 1µF ceramic capacitor.

5

LDRV Low Side Gate Drive Output. Connect to the gate of low-side power MOSFET(s).

6

PGND Power ground. Connect directly to source of low-side MOSFET(s).

7

SW Switch Node Input. Connect as shown in Figure 1. SW provides return for high-side

bootstrapped driver and acts as a sense point for the adaptive shoot-thru protection.

8

HDRV High Side Gate Drive Output – Connect to the gate of high-side power MOSFET(s).

Functional Block Diagram

OD 2

PWM

3

+

1.2

2.2

1.2

VCC

4 VCC

1 BOOT

HDRV

8

SW

7

5 LDRV

PGND

6

2

REV. 1.0.5 7/22/04

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