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FAN5350(2007) データシートの表示(PDF) - Fairchild Semiconductor

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FAN5350 Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Configurations
VIN A1 A3 GND
B2 SW
EN C1 C3 FB
Figure 4. WLCSP - Bumps Facing Down
GND A3 A1 VIN
SW B2
FB C3 C1 EN
Figure 5. WLCSP - Bumps Facing Up
PGND 1
AGND 2
FB 3
P1
(GND)
6 VIN
5 SW
4 EN
Figure 6. 3x3mm MLP - Leads Facing Down
Pin Definitions
WLCSP
Pin # Name
A1
VIN
A3
GND
C1
EN
C3
FB
B2
SW
Description
Power Supply Input.
Ground Pin. Signal and power ground for the part.
Enable Pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.2V. Do not leave this pin floating.
Feedback Analog Input. Connect directly to the output capacitor.
Switching Node. Connection to the internal PFET switch and NFET synchronous rectifier.
MLP
Pin #
1
2
3
4
5
6
Name
PGND
AGND
FB
EN
SW
VIN
Description
Power Ground Pin. Power stage ground. Connect PGND and AGND together via the board
ground plane.
Analog Ground Pin. Signal ground for the part.
Feedback Analog Input. Connect directly to the output capacitor.
Enable Pin. The device is in shutdown mode when voltage to this pin is <0.4V and enabled
when >1.2V. Do not leave this pin floating.
Switching Node. Connection to the internal PFET switch and NFET synchronous rectifier.
Power Supply Input.
© 2007 Fairchild Semiconductor Corporation
FAN5350 Rev. 1.0.1
3
www.fairchildsemi.com

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