M50LPW040 データシートの表示（PDF） - STMicroelectronics

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M50LPW040

4 Mbit (512Kb x8, Uniform Block) 3V Supply Low Pin Count Flash Memory

STMicroelectronics 

M50LPW040

Table 12. Program and Erase Times

(TA = 0 to 70°C or –20 to 85°C; VCC = 3.0 to 3.6V)

Parameter

Interface

Test Condition

Min Typ (1) Max Unit

Byte Program

10

200 µs

Quadruple Byte Program

A/A Mux VPP = 12V ± 5%

10

200 µs

Chip Erase

A/A Mux VPP = 12V ± 5%

5

sec

Block Program

A/A Mux

VPP = 12V ± 5%

VPP = VCC

0.1 (2)

5

sec

0.4

5

sec

Block Erase

VPP = 12V ± 5%

VPP = VCC

0.75

8

sec

1

10 sec

Program/Erase Suspend to Program pause (3)

5

µs

Program/Erase Suspend to Block Erase pause (3)

30

µs

Note: 1. TA = 25°C, VCC = 3.3V

2. This time is obtained executing the Quadruple Byte Program Command.

3. Sampled only, not 100% tested.

During the Block Erase operation the memory will

only accept the Read Status Register command

and the Program/Erase Suspend command. All

other commands will be ignored. Typical Block

Erase times are given in Table 12.

The Block Erase command sets all of the bits in

the block to ‘1’. All previous data in the block is

lost.

See Figure 18, Block Erase Flowchart and Pseudo

Code, for a suggested flowchart on using the

Block Erase command.

Clear Status Register Command. The Clear Sta-

tus Register command can be used to reset bits 1,

3, 4 and 5 in the Status Register to ‘0’. One Bus

Write is required to issue the Clear Status Register

command. Once the command is issued the mem-

ory returns to its previous mode, subsequent Bus

Read operations continue to output the same data.

The bits in the Status Register are sticky and do

not automatically return to ‘0’ when a new Program

or Erase command is issued. If an error occurs

then it is essential to clear any error bits in the Sta-

tus Register by issuing the Clear Status Register

command before attempting a new Program or

Erase command.

Program/Erase Suspend Command. The Pro-

gram/Erase Suspend command can be used to

pause a Program or Block Erase operation. One

Bus Write cycle is required to issue the Program/

Erase Suspend command and pause the Pro-

gram/Erase Controller. Once the command is is-

sued it is necessary to poll the Program/Erase

Controller Status bit to find out when the Program/

Erase Controller has paused; no other commands

will be accepted until the Program/Erase Control-

ler has paused. After the Program/Erase Control-

ler has paused, the memory will continue to output

the Status Register until another command is is-

sued.

During the polling period between issuing the

Program/Erase Suspend command and the

Program/Erase Controller pausing it is possible for

the operation to complete. Once Program/Erase

Controller Status bit indicates that the Program/

Erase Controller is no longer active, the Program

Suspend Status bit or the Erase Suspend Status

bit can be used to determine if the operation has

completed or is suspended. For timing on the

delay between issuing the Program/Erase

Suspend command and the Program/Erase

Controller pausing see Table 12.

During Program/Erase Suspend the Read

Memory Array, Read Status Register, Read

Electronic Signature and Program/Erase Resume

commands will be accepted by the Command

Interface. Additionally, if the suspended operation

was Block Erase then the Program command will

also be accepted; only the blocks not being erased

may be read or programmed correctly.

See Figures 16, Program Suspend & Resume

Flowchart and Pseudo Code, and 19, Erase

Suspend & Resume Flowchart and Pseudo Code,

for suggested flowcharts on using the Program/

Erase Suspend command.

Program/Erase Resume Command. The Pro-

gram/Erase Resume command can be used to re-

start the Program/Erase Controller after a

Program/Erase Suspend has paused it. One Bus

Write cycle is required to issue the Program/Erase

Resume command. Once the command is issued

subsequent Bus Read operations read the Status

Register.

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