TDA8540T データシートの表示（PDF） - Philips Electronics
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TDA8540T Datasheet PDF : 20 Pages
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Philips Semiconductors
4 × 4 video switch matrix
Product specification
TDA8540
FUNCTIONAL DESCRIPTION
The TDA8540 is controlled via a bidirectional I2C-bus.
3 bits of the I2C address can be selected via the address
pin, thus providing a facility for parallel connection of
7 devices.
Control options via the I2C-bus:
• The input signals can be clamped at their negative peak
(top sync).
• The gain factor of the outputs can be selected between
1× or 2×.
• Each of the four outputs can individually be connected
to one of the four inputs.
• Each output can individually be set in a high impedance
state.
• Two binary output data lines can be controlled for
switching accompanying sound signals.
The SDA and SCL pins (pins 19 and 18) can be connected
to the I2C-bus or to DC switching voltage sources. Address
inputs S0 to S2 (pins 11, 7 and 5) are used to select
sub-addresses or switching to the non-I2C mode. Inputs
S0 to S2 can be connected to the supply voltage (HIGH) or
the ground (LOW). In this way no peripheral components
are required for selection.
Table 1 I2C-bus sub-addressing
SUB-ADDRESS
S2
S1
S0
A2
A1
A0
L
L
L
0
0
0
L
L
H
0
0
1
L
H
L
0
1
0
L
H
H
0
1
1
H
L
L
1
0
0
H
L
H
1
0
1
H
H
L
1
1
0
H
H
H
non I2C addressable
I2C-bus control
After power-up the outputs are initialized in the high
impedance state, and D0 and D1 are at a LOW level.
Detailed description of the I2C-bus specification, with
applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code
9398 393 40011.
The TDA8540 is a slave receiver and the protocol is given
in Table 2.
Table 2 The TDA8540 protocol
SEQUENCE
S(1)
SLV(2)
A(3)
SUB
A(3)
DATA
A(3)
Notes
1. S = START condition.
2. Data transmission to the TDA8540 starts with the slave address (SLV).
3. A = acknowledge bit, generated by TDA8540.
4. P = STOP condition.
Table 3 Data transmission to the TDA8540 begins with SLV
A6
MSB
A5
A4
A3
A2
1
0
0
1
A2(1)
Notes
1. A2 to A0: pin programmable slave address bits.
2. R/W = 0; write only.
A1
A1(1)
DATA
A0
A0(1)
A(3) P(4)
R/W
LSB
0(2)
After the SLV, a second byte, SUB, is required for selecting the functions, as shown in Table 4.
1995 Feb 06
5
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