FM25V05 データシートの表示（PDF） - Cypress Semiconductor

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FM25V05

512Kb Serial 3V F-RAM Memory

Cypress Semiconductor 

System Hookup

The SPI interface uses a total of four pins: clock,

data-in, data-out, and chip select. A typical system

configuration uses one or more FM25V05 devices

with a microcontroller that has a dedicated SPI port,

as Figure 3 illustrates. Note that the clock, data-in,

and data-out pins are common among all devices.

The Chip Select and Hold pins must be driven

separately for each FM25V05 device.

FM25V05 - 512Kb SPI FRAM

For a microcontroller that has no dedicated SPI bus, a

general purpose port may be used. To reduce

hardware resources on the controller, it is possible to

connect the two data pins together and tie off the

Hold pin. Figure 4 shows a configuration that uses

only three pins.

SCK

MOSI

MISO

SPI

Microcontroller

SS1

SS2

HOLD1

HOLD2

Q DC

FM25V05

S HOLD

QD C

FM25V05

S HOLD

MOSI : Master Out Slave In

MISO : Master In Slave Out

SS : Slave Select

Figure 3. 1Mbit (128KB) System Configuration with SPI port

P1.0

P1.1

Microcontroller

P1.2

QDC

FM25V05

S HOLD

Figure 4. System Configuration without SPI port

Document Number: 001-84497 Rev. **

Page 4 of 17

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