FM25V20 データシートの表示（PDF） - Cypress Semiconductor

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FM25V20

2Mb Serial 3V F-RAM Memory

Cypress Semiconductor 

Endurance

The FM25V20 device is capable of being accessed at

least 1014 times, reads or writes. An F-RAM memory

operates with a read and restore mechanism.

Therefore, an endurance cycle is applied on a row

basis for each access (read or write) to the memory

array. The F-RAM architecture is based on an array

of rows and columns. Rows are defined by A17-A3

and column addresses by A2-A0. See Block

Diagram (pg 2) which shows the array as 32K rows

FM25V20 - 2Mb SPI F-RAM

of 64-bits each. The entire row is internally accessed

once whether a single byte or all eight bytes are read

or written. Each byte in the row is counted only once

in an endurance calculation. The table below shows

endurance calculations for 64-byte repeating loop,

which includes an op-code, a starting address, and a

sequential 64-byte data stream. This causes each byte

to experience one endurance cycle through the loop.

F-RAM read and write endurance is virtually

unlimited even at 40MHz clock rate.

Table 6. Time to Reach 100 Trillion Cycles for Repeating 64-byte Loop

SCK Freq

(MHz)

Endurance

Cycles/sec.

Endurance

Cycles/year

Years to Reach

1014 Cycles

40

73,520

2.32 x 1012

43.1

10

18,380

5.79 x 1011

172.7

5

9,190

2.90 x 1011

345.4

Rev. 3.0

August 2012

Page 10 of 17

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