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HD74HC4514 データシートの表示(PDF) - Hitachi -> Renesas Electronics

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HD74HC4514
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD74HC4514 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
HD74HC4514
4-bit Latch/4-to-16-line Decoder
Description
This device presents a 4-to-16 line decoder with latched in puts. The HD74HC4514 presents a high level at
the selected output.
This device consists of four storage latches with common strobe and inhibit (G) inputs. When a low signal
is applied to the strobe input, the input data is stored, decoded, and presented to the output. When strobe is
high, all sixteen HD74HC4514 outputs are at a low logic level.
Features
High Speed Operation: tpd (Data to S) = 20 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

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