SN74LS85M データシートの表示（PDF） - ON Semiconductor

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SN74LS85M

4−Bit Magnitude Comparator

ON Semiconductor 

SN74LS85

CONNECTION DIAGRAM DIP (TOP VIEW)

VCC A3 B2 A2 A1 B1 A0 B0

16 15 14 13 12 11 10 9

NOTE:

The Flatpak version has the same

pinouts (Connection Diagram) as

the Dual In-Line Package.

1 2 3 4 56 78

B3 IA<B IA=B IA>B OA>B OA=B OA<B GND

PIN NAMES

A0 − A3, B0 − B3

IA = B

IA < B, IA > B

OA > B

OA < B

OA = B

Parallel Inputs

A = B Expander Inputs

A < B, A > B, Expander Inputs

A Greater than B Output

B Greater than A Output

A Equal to B Output

LOADING (Note a)

HIGH

LOW

1.5 U.L.

1.5 U.L.

0.5 U.L.

10 U.L.

10 U.L.

10 U.L.

0.75 U.L.

0.75 U.L.

0.25 U.L.

5 U.L.

5 U.L.

5 U.L.

NOTES:

a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.

LOGIC SYMBOL

10 12 13 15 9 11 14 1

A0 A1 A2 A3 B0 B1 B2 B3

4 IA>B

OA>B 5

2 IA<B

OA<B 7

3 IA=B

OA=B 6

VCC = PIN 16

GND = PIN 8

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