PCA8550 データシートの表示（PDF） - Philips Electronics
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PCA8550 Datasheet PDF : 12 Pages
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Philips Semiconductors
4-bit multiplexed/1-bit latched 5-bit I2C EEPROM
Product specification
PCA8550
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
1
I2C SCL
2
I2C SDA
FUNCTION
I2C bus clock
Bi-directional I2C bus data
3
OVERRIDE#
Forces all outputs to logic 0
4
MUX_IN A
5
MUX_IN B
External inputs to multiplexer
6
MUX_IN C
7
MUX_IN D
8
GND
Common ground voltage rail
9
MUX_OUT D
10
MUX_OUT C
2.5V multiplexed output
11
MUX_OUT B
12
MUX_OUT A
Selects MUX_IN inputs or
13
MUX_SELECT register contents for
MUX_OUT outputs
14
NON_MUXED_OUT
TTL-level output from
non-volatile memory
15
WP
Non-volatile register
write-protect
16
VCC
Positive voltage rail
FUNCTION TABLE
Table 1. Function table
OVERRIDE
#
MUX_SELECT
MUX_OUT
OUTPUTS
NON_MUXED_OUT
OUTPUT
0
0
All 0’s
All 0’s
0
1
MUX_IN
Latched
inputs NON_MUXED_OUT1
1
0
From non-
volatile
register
From non-volatile
register
1
1
MUX_IN
inputs
From non-volatile
register
NOTE
1. Latched NON_MIXED_OUT state will be the value present on
the NON_MUXED_OUT output at the time of the MUX_SELECT
input transitioned from a logic 0 to a logic 1 state.
I2C Interface
Communicating with this device is initiated by sending a valid address on the I2C bus. The address format (see FIgure 1) is a fixed unique 7-bit
value followed by a 1-bit read/write value which determines the direction of the data transfer.
MSB
1
0
0
1
1
1
LSB
0
R/W#
Figure 1. I2C Address Byte
SW00218
Following the address and acknowledge bit are 8 data bits which, depending on the read/write bit in the address, will read data from or write
data to the non-volatile register. Data will be written to the register if the read/write bit is logic 0 and the WP input is logic 0. Data will be read
from the register if the bit is logic 1. The three high-order bits (see FIgure 2) are logic 0. The next bit is data which is non-multiplexed. The low
four bits are the data which will be multiplexed. A write with any of the first three bits non-zero will be aborted.
NOTE:
1. To ensure data integrity, the non-volatile register must be internally write protected when VCC to the I2C bus is powered down or VCC to the
component is dropped below normal operating levels.
1998 Sep 29
3
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