FSA1256(2008) データシートの表示（PDF） - Fairchild Semiconductor

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FSA1256
(Rev.:2008)

Low-RON Low-Voltage, Dual SPST Analog Switch with Low-ICCT “A” Option

Fairchild Semiconductor 

Test Diagrams (Continued)

Network Analyzer

RS

VSel

V IN

GND

VS

GND

GND

RT

GND

VOUT

RT

GND

GND

RS and RT are functions of the application

environment (50, 75, or 100 ).

Crosstalk = 20 Log (VOUT / VIN)

Figure 12. Adjacent Channel Crosstalk

Generator

B

VS

RS VIN

GND

nSn

VSEL

GND

VCC

mA

Input – VSEL Off

On

Off

CL

VOUT

GND

0V

VOUT

ΔVOUT

CL includes test fixture and stray capacitance

Figure 13. Charge Injection Test

Q = ΔVOUT • CL

B0,B1

Capacitance

Meter

f=1MHz

Select

VS = 0 or VCC

B0nB1

Figure 14. Channel Off Capacitance

Capacitance nBn

Meter

f=1MHz

Select

VS = 0 or VCC

nBn

Figure 15. Channel On Capacitance

Audio Analyzer

RS

GND

VCNTRL

GND

GND

VCNTRL = 0 or Vcc

RS and RT are functions of the

application environment.

VIN

VS

GND

VOUT

RT

GND

Figure 16. Total Harmonic Distortion

© 2004 Fairchild Semiconductor Corporation

FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5

8

www.fairchildsemi.com

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