SM5L1 データシートの表示（PDF） - Sharp Electronics
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SM5L1 Datasheet PDF : 27 Pages
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4-Bit Single Chip Microcomputers
SM5L1/SM5L2/SM5L3
SYSTEM CONFIGURATION
A Register and X Register
The A register (or accumulator: ACC) is a 4-bit gen-
eral purpose register. The register is mainly used in
conjunction with the ALU, C flag and RAM to transfer
numerical value and data to perform various opera-
tions. The A register is also used to transfer data
between input and output pins.
The X register (or auxiliary accumulator) is a 4-bit
register and can be used as a temporary register. It
loads contents of the A register or its content is trans-
ferred to the A register.
When the table reference instruction PAT is used,
the X and A registers load ROM data. A pair of A and X
registers can accommodate 8-bit data.
3
0
A REGISTER
EXAX
INSTRUCTION
3
0
X REGISTER
5L1-8
Figure 8. Data Transfer Example Between
A Register and X Register
Arithmetic and Logic Unit (ALU) and
Carry Signal Cy
The ALU performs 4-bit parallel operation. The ALU
operates binary addition in conjunction with RAM, C
flag and A register. The carry signal Cy is generated if
a carry occurs during ALU operation. Some instruc-
tions use Cy: ADC instruction sets/clears the content of
the C flag; ADX instruction causes the program to skip
the next instruction. Note that Cy is the symbol for carry
signal and not for C flag.
4-BIT 4-BIT
DATA DATA
ALU
RESULT OF
OPERATION
Areg
C
5L1-9
Figure 9. ALU
B Register and SB Register
B REGISTER (BM, BL)
The B register is an 8-bit register that is used to
specify the RAM address. The upper 4-bit section is
called the BM register and lower 4-bit section is called
the BL register.
SB REGISTER
The SB register is an 8-bit register used as the save
register for the B register. The contents of B register and
SB register can be exchanged through EX instruction.
B
REGISTER
3
0
BM REGISTER
3
0
BL REGISTER
EX INSTRUCTION
(SWAP)
7
0
SB REGISTER
5L1-10
Figure 10. B Register and SB Register
Data Memory (RAM)
The data memory (RAM) is used for storage. The
RAM capacity consists of:
• SM5L1: 69 × 4-bit, includes 21 × 4-bit display RAM.
• SM5L2: 130 × 4-bit, includes 34 × 4-bit display RAM.
• SM5L3: 170 × 4-bit, includes 42 × 4-bit display RAM.
Display RAM, outputs data to an external pin for
driving the segments of the LCD. Therefore, by writing
data to the display RAM, the LCD can be driven at 1/4
duty (1/2 bias) to enable automatic display of the LCD.
As shown in Figure 14, the display RAM is con-
nected to segment outputs.
• SM5L1: Port S0 to S20
• SM5L2: Port S0 to S33
• SM5L3: Port S0 to S41
These segment outputs correspond to the LCD
common outputs H0 to H3. Data M0 to M3 is for one
column of the display RAM and is output as a LCD
drive waveform which corresponds to outputs H0 to
H3. As a RAM, the display RAM operates exactly the
same as other RAMs.
Microcomputer Data Sheet
9
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