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FSL137H データシートの表示(PDF) - Fairchild Semiconductor

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FSL137H
Fairchild
Fairchild Semiconductor Fairchild
FSL137H Datasheet PDF : 15 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Configuration
F Fairchild Logo
Z – Plant Code
X – 1-Digit Year Code
Y – 1-Digit Week Code
TT – 2-Digit Die Run Code
T – Package Type (N: DIP)
P – Y: Green Package
M – Manufacture Flow Code
Figure 3. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
GND
VDD
FB
VIN
HV
Drain
Drain
Drain
Description
Ground. SenseFET source terminal on primary side and internal controller ground.
Power Supply. The internal protection circuit disables PWM output as long as VDD exceeds the
OVP trigger point.
Feedback. The signal from the external compensation circuit is fed into this pin. The PWM duty
cycle is determined in response to the signal on this pin and the internal current-sense signal.
Line-Voltage Detection. The line-voltage detection is used for brownout protection with
hysteresis and constant output power limit over universal AC input range. This pin has additional
protections that are pull-HIGH latch and pull-low auto recovery, depending on the application.
Startup. For startup, this pin is pulled HIGH to the line input or bulk capacitor via resistors.
SenseFET Drain. High-voltage power SenseFET drain connection.
SenseFET Drain. High-voltage power SenseFET drain connection.
SenseFET Drain. High-voltage power SenseFET drain connection.
© 2009 Fairchild Semiconductor Corporation
FSL137H Rev. 1.0.3
3
www.fairchildsemi.com

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