HEF4086B データシートの表示（PDF） - Philips Electronics
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HEF4086B Datasheet PDF : 5 Pages
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Philips Semiconductors
4-wide 2-input AND-OR-invert gate
Product specification
HEF4086B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL TYP. MAX.
Propagation delays
I0 to I7 → O
HIGH to LOW
LOW to HIGH
I8 → O
HIGH to LOW
LOW to HIGH
I9 → O
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
5
10
tPHL
15
5
10
tPLH
15
5
10
tPHL
15
5
10
tPLH
15
5
10
tPHL
15
5
10
tPLH
15
5
10
tTHL
15
5
10
tTLH
15
90 180 ns
30 65 ns
20 40 ns
80 155 ns
30 60 ns
20 40 ns
70 140 ns
25 55 ns
20 40 ns
55 115 ns
20 40 ns
15 25 ns
55 105 ns
20 45 ns
15 30 ns
45 90 ns
15 35 ns
10 25 ns
60 120 ns
30 60 ns
20 40 ns
60 120 ns
30 60 ns
20 40 ns
TYPICAL EXTRAPOLATION
FORMULA
63 ns + (0,55 ns/pF) CL
19 ns + (0,23 ns/pF) CL
12 ns + (0,16 ns/pF) CL
53 ns + (0,55 ns/pF) CL
19 ns + (0,23 ns/pF) CL
12 ns + (0,16 ns/pF) CL
43 ns + (0,55 ns/pF) CL
14 ns + (0,23 ns/pF) CL
12 ns + (0,16 ns/pF) CL
28 ns + (0,55 ns/pF) CL
9 ns + (0,23 ns/pF) CL
7 ns + (0,16 ns/pF) CL
28 ns + (0,55 ns/pF) CL
9 ns + (0,23 ns/pF) CL
7 ns + (0,16 ns/pF) CL
18 ns + (0,55 ns/pF) CL
4 ns + (0,23 ns/pF) CL
2 ns + (0,16 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
10 ns + (1,0 ns/pF) CL
9 ns + (0,42 ns/pF) CL
6 ns + (0,28 ns/pF) CL
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P (µW)
5
525 fi + ∑ (foCL) × VDD2
where
10
2600 fi + ∑ (foCL) × VDD2
fi = input freq. (MHz)
15
7300 fi + ∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
4
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