GF6968AD データシートの表示（PDF） - General Semiconductor

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GF6968AD

N-Channel Enhancement-Mode MOSFET Die

General Semiconductor 

GF6968AD

N-Channel Enhancement-Mode MOSFET Die

Chip Geometry

VDS 20V RDS(ON) 30mΩ ID 6.0A

TGREENNFCHENTeTwM Product

Source

Gate

D

Physical Characteristics

• Die size : 1800 X 1120µm (70.9 X 44.1 mils)

• Metalization:

Top: Al/Si/Cu

Back: Ti/Ni/Ag

• Metal Thickness:

Top: 3.0µm

Back: 1.4µm

• Die thickness: 9 - 13 mils

• Bonding Area:

Source: Full metalized surface of source region

Gate: 181 x 181µm

• Recommended Wire Bonding:

Source: 2 mil ∅ Au wire (3 or more wires preferred)

Gate: 2 mil ∅ Au wire

Note: More source wires can further improve performance

G

S

Features

• Advanced Trench Process Technology

• High Density Cell Design for Ultra Low

On-Resistance

• Fast Switching

• High temperature soldering in accordance

with CECC802/Reflow guaranteed

• Logic Level

• Ideal for Li ion battery pack applications

Maximum Ratings and Thermal Characteristics (TA = 25°C unless otherwise noted)

Parameter

Symbol

Limit

Drain-Source Voltage

VDS

20

Gate-Source Voltage

VGS

± 10

Continuous Drain Current

TJ = 150°C(1)

TA = 25°C

TA = 70°C

ID

6.0

4.8

Pulsed Drain Current

IDM

20

Continuous Source Current (Diode Conduction)(1)

IS

1.7

Maximum Power Dissipation(1)

TA = 25°C

TA = 70°C

PD

2.0

1.3

Operating Junction and Storage Temperature Range

Maximum Junction-to-Ambient(1) Thermal Resistance

TJ, Tstg

RθJA

–55 to 150

62.5

Note: Maximum ratings are based on die packaged in a SO-8 Dual package. Actual rating can increase (or decrease),

depending on actual assembly method used

Unit

V

A

W

°C

°C/W

5/23/01

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