GF6968AD データシートの表示（PDF） - General Semiconductor

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GF6968AD

N-Channel Enhancement-Mode MOSFET Die

General Semiconductor 

GF6968AD

N-Channel Enhancement-Mode MOSFET Die

Electrical Characteristics (TJ = 25°C unless otherwise noted)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Static

Drain-Source Breakdown Voltage

BVDSS

VGS = 0V, ID = 250µA

20

–

–

V

Gate Threshold Voltage

Gate-Body Leakage

VGS(th) VDS = VGS, ID = 250µA

0.5

IGSS

VDS = 0V, VGS = ±8V

–

–

–

V

–

± 100

nA

Zero Gate Voltage Drain Current

On-State Drain Current(2)

VDS = 20V, VGS = 0V

–

–

IDSS

VDS=20V, VGS=0V, TJ=55°C –

–

ID(on)

VDS ≥ 5V, VGS = 4.5V

20

–

1

µA

5

–

A

Drain-Source On-State Resistance(2)

Forward Transconductance(2)

RDS(on)

VGS = 4.5V, ID = 6A

–

VGS = 2.5V, ID = 5.2A

–

gfs

VDS = 10V, ID = 6A

–

22

30

mΩ

28

40

24

–

S

Dynamic

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Qg

–

Qgs

VDS = 10V, VGS = 4.5V

–

Qgd

ID = 6A

–

13

40

2.2

–

nC

3

–

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

td(on)

–

VDD = 10V, RL = 10Ω

tr

–

ID ≈ 1A, VGEN = 4.5V

td(off)

–

RG = 6Ω

tf

–

11

60

15

140

ns

43

140

22

60

Input Capacitance

Ciss

VGS = 0V

–

1240

–

Output Capacitance

Coss

VDS = 10V

–

200

–

pF

Reverse Transfer Capacitance

Crss

f = 1.0MHZ

–

120

–

Source-Drain Diode

Diode Forward Voltage(2)

VSD

IS = 1.7A, VGS = 0V

–

0.7

1.3

V

Source-Drain Reverse Recovery Time

trr

IF = 1.7A, di/dt = 100A/µs

–

–

100

ns

Notes:

(1) Surface mounted on FR4 board, t ≤ 10 sec.

(2) Pulse test; pulse width ≤ 300 µs,

duty cycle ≤ 2%

VDD

VIN

RD

D

VOUT

VGEN

RG

DUT

G

S

Switching

Test Circuit

td(on)

ton

tr

td(off)

90%

toff

tf

90 %

Output, VOUT

Input, VIN 10%

Switching

Waveforms

10%

50%

10%

INVERTED

90%

50%

PULSE WIDTH

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