GL850G データシートの表示（PDF） - Genesys Logic

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GL850G

USB 2.0 HUB Controller

Genesys Logic 

GL850G USB 2.0 Low-Power HUB Controller

3.2 Pin List

－ Table 3.1 GL850G 48 Pin List

Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type

1 AVDD

P 13 AGND

P 25 DVDD

P 37 PSELF

I_5V

2 AGND

P 14 X1

I 26 RESET# I_5V 38 DVDD

P

3 DM0

B 15 X2

O 27 TEST

I 39 PGANG

B

4 DP0

B 16 AVDD

P 28 OVCUR4# I_5V 40 OVCUR2# I_5V

5 DM1

6 DP1

7 AVDD

8 AGND

B 17 DM3

B 18 DP3

P 19 AVDD

P 20 AGND

B 29 PWREN4# O 41 PWREN2# O

B 30 OVCUR3# I_5V 42 OVCUR1# I_5V

P 31 PWREN3# O 43 PWREN1# O

P 32 PGREEN3 O 44 DVDD

P

9 DM2

B 21 DM4

B 33 PAMBER3 O 45 PGREEN1 O

10 DP2

B 22 DP4

B 34 DVDD

P 46 PAMBER1 O

11 RREF

B 23 PGREEN4 O 35 PGREEN2 B 47 V5

P

12 AVDD

P 24 PAMBER4 O 36 PAMBER2 O 48 V33

P

3.3 Pin Descriptions

Table 3.3 - Pin Descriptions

USB Interface

Pin Name

GL850G

48Pin#

I/O Type

Description

DM0,DP0

3,4

B USB signals for USPORT

DM1,DP1

5,6

B USB signals for DSPORT1

DM2,DP2

9,10

B USB signals for DSPORT2

DM3,DP3

17,18

B USB signals for DSPORT3

DM4,DP4

RREF

21,22

11

B USB signals for DSPORT4

B

A 680Ω resister must be connected between RREF and analog

ground (AGND).

Note: USB signals must be carefully handled in PCB routing. For detailed information, please refer to

GL850G Design Guideline.

©2000-2007 Genesys Logic Inc. - All rights reserved.

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