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AZ100EL57D(2000) データシートの表示(PDF) - AZ Microtek

部品番号
コンポーネント説明
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AZ100EL57D
(Rev.:2000)
Arizona-Microtek
AZ Microtek Arizona-Microtek
AZ100EL57D Datasheet PDF : 2 Pages
1 2
DATA SHEET
AZ10EL57
AZ100EL57
ARIZONA MICROTEK, INC.
4:1 Differential Multiplexer
FEATURES
75kInternal Input Pulldown Resistors
2:1 Operation When SEL1 Not Connected
PACKAGE AVAILABILITY
Multiple VBB Outputs Allow Single-ended
Operation
Direct Replacement For ON Semiconductor
PACKAGE
SOIC 16
SOIC 16
PART NO.
AZ10EL57D
AZ100EL57D
MARKING
AZM10EL57
AZM100EL57
MC10EL57 & MC100EL57
Manufactured Under License By Lucent Technologies
DESCRIPTION
The AZ10EL/100EL57 is a fully differential 4:1 multiplexer. By leaving the SEL1 line open (pulled LOW
via the input pulldown resistor) the device can also be used as a differential 2:1 multiplexer with the SEL0 input
selecting between D0 and D1. The fully differential architecture of the EL57 makes it ideal for use in low skew
applications such as clock distribution.
The SEL1 is the most significant select line. The binary number applied to the select inputs will select the
same numbered data input (i.e., 00 selects D0, 01 selects D1, etc.).
The EL57 provides two VBB outputs for either single-ended use or as a DC bias for AC coupling to the
device. The VBB pins should be used only as a bias for the EL57 as its current sink/source capability is limited.
Whenever used, the VBB pins should be bypassed to ground via a 0.01 µF capacitor.
PIN DESCRIPTION
PIN
D0, D0N – D3, D3N
SEL0,1
VBB1,2
Q, QN
FUNCTION
Data Input Pairs
Mux Select Inputs
Reference Outputs
Data Outputs
FUNCTION TABLE
SEL1
SEL0
Q
L
L
D0
L
H
D1
H
L
D2
H
H
D3
6/15/00
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
VCC SEL0 SEL1 Q
16 15 14 13
QN VBB1 VBB2 VEE
12 11 10 9
4:1
1
2
3
4
5
6
7
8
D0 D0N D1 D1N D2 D2N D3 D3N

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