HEF4755VPN データシートの表示（PDF） - Philips Electronics

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HEF4755VPN

Transceiver for serial data communication

Philips Electronics 

Philips Semiconductors

Transceiver for serial data communication

Product specification

HEF4755V

LSI

HEF4755VP(N): 28-lead DIL; plastic

(SOT117-2)

HEF4755VD(F): 28-lead DIL; ceramic (cerdip)

(SOT135)

HEF4755VT(D): 28-lead SO; plastic

(SOT136-1)

( ): Package Designator North America

PINNING

1 TST

2 ML0

3 ML1

Test pin; during normal use

connected to VSS. When TST is

HIGH (VDD), internal check points

are connected to the data bus.

Input code for message length (see

Table 1).

4 DIO0

to to

Bidirectional data bus.

11 DIO7

12 RX

Mode input: receive; see Table 2

13 TX

Mode input: transmit; see Table 2

15 AS

Mode input: asynchronous;

see Table 2

16 R

Reset; a positive signal resets

all internal registers.

17 START Input start in transmitting mode;

synchronization input (from MOS)

in synchronous receiving mode.

18 BUSY Output busy; active during

receiving or transmitting a message.

19 HD

20 MOS

21 MO

22 MI

23 DP

24 ERR

25 CP

26 TT1

27 TT0

28 VDD

14 VSS

Hamming distance; determines the

length of the redundancy byte:

LOW = 7 bit (HD = 4)

HIGH = 15 bit (HD = 6)

Output message synchronization

used in synchronous mode.

Message output.

Message input.

Output data pulse; take-over pulse

for data on the data bus.

Output error; an active output

means that at least 1 transmission

error is recognized.

Clock input; in synchronous mode

equal to the transmission bit rate.

Programming of the permissible time

tolerance in bit distortion

(see Table 3).

Positive supply voltage; 4,5 V to

12,5 V (is the logic HIGH level).

Ground (is the logic LOW level).

January 1995

3

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