HD6432676 データシートの表示（PDF） - Renesas Electronics

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HD6432676

16-Bit Single-Chip Microcomputer H8S Family/H8S/2600 Series

Renesas Electronics 

Main Revisions in This Edition

Item

All

Page

—

6.2 Input/Output Pins 124

Table 6.1 Pin

Configuration

124

7.5.1 Transfer

288

Modes

Table 7.4 DMAC

Transfer Modes

289

Section 10 I/O Ports

Table 10.1 Port

Functions

428 to

432

432

Revision (See Manual for Details)

All references to Hitachi, Hitachi, Ltd., Hitachi

Semiconductors, and other Hitachi brand names changed to

Renesas Technology Corp. Designation for categories

changed from “series” to “group”

Symbols amended

Upper column address strobe/upper data mask enable

(Before) UCAS/DQMU → (After) UCAS/DQMU

Lower column address strobe/upper data mask enable

(Before) LCAS/DQML → (After) LCAS/DQML

I/O description amended

Data Transfer acknowledge 0 (DMAC) (Before) DACK0 →

(After) Output

Table 7.4 amended

Transfer Mode

Short

address

mode

Dual address mode

(1) Sequential mode

• Memory address incremented or

decremented by 1 or 2

• Number of transfers:

1 to 65,536

(2) Idle mode

• Memory address fixed

• Number of transfers:

1 to 65,536

(3) Repeat mode

• Memory address incremented or

decremented by 1 or 2

• Continues transfer after sending

number of transfers (1 to 256) and

restoring the initial value

Transfer Source

• TPU channel 0 to 5

compare match/input

capture A interrupt

• SCI transmission complete

interrupt

• SCI reception complete

interrupt

• A/D converter conversion

end interrupt

• External request

Remarks

• Up to 4 channels can

operate independently

• External request

applies to channel B

only

• Single address mode

applies to channel B

only

Transfer Mode

Full

address

mode

Normal mode

(1) Auto-request

• Transfer request is internally held

• Number of transfers (1 to 65,536) is

continuously sent

• Burst/cycle steal transfer can be

selected

Transfer Source

Auto-request

Remarks

• Max. 2-channel

operation, combining

channels A and B

Notes amended

Modes 3*1, 7

CKE*2 DQML*2

WE*2

DQMU*2

CAS*2

RAS*2

SDRAMφ*2

Notes: 1. Mode 3 is not supported in H8S/2378 Group.

2. These pins are not supported in H8S/2678 Group.

Rev. 3.00 Mar 17, 2006 page vii of l

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