HCF40103BEY(2002) データシートの表示（PDF） - STMicroelectronics

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HCF40103BEY
(Rev.:2002)

8-STAGE PRESETTABLE SYNCHRONOUS 8 BIT BINARY DOWN COUNTERS

STMicroelectronics 

TYPICAL APPLICATIONS

DIVIDE BY "N" COUNTER

HCF40103B

SYNCHRONOUS CASCADING

MICROPROCESSOR INTERRUPT TIMER

SYNCHRONOUS CASCADING

MICROPROCESSOR INTERRUPT TIMER

* An Output spike (160ns at VDD = 5V) occurs whenever two or

more devices are cascaded in the parallel clocked mode because

the clock-to-carry out delay is greater than the carry-in-to-carry-out

delay. This spike is eliminated by gating the output of the last device

with the clock as shown.

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