HD404314H データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HD404314H

4-bit HMCS400-series microcomputer

Hitachi -> Renesas Electronics 

HD404318 Series

Table 1 Initial Values of Flags after MCU Reset

Item

Interrupt flags/mask

Bit registers

Interrupt enable flag (IE)

Interrupt request flag (IF)

Interrupt mask (IM)

Watchdog timer on flag (WDON)

A/D start flag (ADSF)

Input capture status flag (ICSF)

Input capture error flag (ICEF)

IAD off flag (IAOF)

RAM enable flag (RAME)

Initial Value

0

0

1

0

0

0

0

0

0

RAM Address

$0000

Bit 3

IM0

(IM of INT0)

$0001

IMTA

(IM of timer A)

$0002

IMTC

(IM of timer C)

Bit 2

IF0

(IF of INT0)

IFTA

(IF of timer A)

IFTC

(IF of timer C)

Bit 1

RSP

(Reset SP bit)

IM1

(IM of INT1)

IMTB

(IM of timer B)

Bit 0

IE

(Interrupt

enable flag)

IF1

(IF of INT1)

IFTB

(IF of timer B)

$0003

IMS

(IM of serial)

IFS

(IF of serial)

IMAD

(IM of A/D)

IFAD

(IF of A/D)

Interrupt control bits area

Bit 3

$020

Not used

$021

IF: Interrupt

request flag

IM: Interrupt

$022

mask

IE: Interrupt

enable flag $023

SP: Stack pointer

RAME

(RAM enable

flag)

Bit 2

ADSF

(A/D start flag)

IAOF

(IAD off flag)

Bit 1

WDON

(Watchdog

on flag)

ICEF

(Input capture

error flag)

Bit 0

Not used

ICSF

(Input capture

status flag)

Not used

Register flag area

Figure 3 Interrupt Control Bits and Register Flag Areas Configuration

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