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HD4048412 データシートの表示(PDF) - Renesas Electronics

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HD4048412
Renesas
Renesas Electronics Renesas
HD4048412 Datasheet PDF : 127 Pages
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HD404849 Series
Direct Addressing Mode: A program can branch to any address in the ROM memory space by executing
the JMPL, BRL, or CALL instruction. Each of these instructions replaces the 14 program counter bits
(PC13–PC0) with 14-bit immediate data.
Current Page Addressing Mode: The MCU has 64 pages of ROM with 256 words per page. A program
can branch to any address in the current page by executing the BR instruction. This instruction replaces the
eight low-order bits of the program counter (PC7–PC0) with eight-bit immediate data. If the BR instruction
is on a page boundary (address 256n + 255), executing that instruction transfers the PC contents to the next
physical page, as shown in figure 94. This means that the execution of the BR instruction on a page
boundary will make the program branch to the next page.
Instruction
[P]
Opcode
p3 p2 p1 p0
B register
Accumulator
00
B3 B2 B1 B0 A3 A2 A1 A0
Referenced ROM address RA13 RA12 RA11 RA10 RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0
Address Designation
ROM data
RO9 RO8 RO7 RO6 RO5 RO4 RO3 RO2 RO1 RO0
Accumulator, B register
B3
B2 B1 B0
A3
A2
A1
A
0
If RO8 = 1
ROM data
RO9 RO8 RO7 RO6 RO5 RO4 RO3 RO2 RO1 RO0
Output registers R1, R2 R23 R22 R21 R20 R13 R12 R11 R10 If RO9 = 1
Pattern Output
Figure 93 P Instruction
111

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